Samsung Electronics is shipping a two-chip chipset for high definition television (HDTV) and set-top-boxes. The S5H2010 MPEG-2 decoder and S3C2800 Digital TV central processing unit (CPU) silicon duo target low- to mid-range HDTVs and HD STBs, and will be supplied with embedded Linux.

Samsung's chipset includes a 200 MHz ARM9 32-bit RISC processor core, single HD capable MPEG-2 decoder, transport demultiplexer, 2D graphic engine, display processor engine, NTSC/PAL encoder, smart card interface, and PCI.

The chipset includes a development platform and reference design kit based on embedded Linux, with “production ready middleware, device drivers, application software, and local technical support,” according to Samsung.

The S5H2010/S3C2800 solution is a major component in Samsung's line up of newly introduced HD TVs, including a 55-inch projection HDTV, wireless HDTV and wireless LCD TV.

Market research firms In-Stat/MDR and iSuppli Corp. expect the HDTV and HD STB market to reach approximately 5 million and 4 million boxes, respectively, by 2005. In the U.S., all new televisions over 13-inches must be digital-ready by 2007, due to an FCC (Federal Communication Commission) mandate.

“We designed the S5H2010/S3C2800 chipset to enable TV and STB manufacturers to quickly enter this market with high-performance/high-value solutions,” said Don H. Lee, VP of SoC R&D center for Samsung Electronics.

The S5H2010/S3C2800 chipset solution is available now in production quantities to consumer electronics manufacturers in the United States and Korea.

 
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