Force adds Linux to CompactPCI server blade
Jan 14, 2003 — by LinuxDevices Staff — from the LinuxDevices Archive — viewsFremont, CA — (PR excerpt) — Solectron subsidiary Force Computers today introduced Linux support on its Common Heterogeneous Architecture for Multi-Processing (CHAMP) server blade with AltiVec (AV) technology. Baselined on a port of Linux 2.4.18, this quad G4 CompactPCI blade offers five Motorola PowerPC processors ideally suited for intense data processing and throughput demands of 'high-touch' packet… applications.
With four MPC7410 processors performing packet analysis and one MPC8240 processor managing onboard data flow, Compact CHAMP-AV provides 4,096 H.110 channels of time-division multiplexing (TDM) switching along with meeting packet-processing requirements. An upgrade to a Compact CHAMP/Linux solution using Force's full-feature Linux support package enables complete control over all blade hardware aspects as well as reduces total cost of ownership by up to 10 times compared to legacy circuit-based telecom switches.
“Five PowerPC MPC8240 I/O processor manage all on board dataflow, which frees the four MPC7410s to concentrate solely on packet analysis and inspection,” said Robert Hoyecki, director of application engineering for Force's High-Density Computing group. “For high-touch packet applications, the 4,096 channels on the H.110 interface can be routed to all available onboard resources so all the G4s can perform packet analysis. Specifically, telecom circuit-based switch applications can benefit by upgrading to Compact CHAMP-with potential total cost of ownership savings of up to 10 times versus legacy technologies.”
To best organize the resources of the Compact CHAMP-AV blade, its four PowerPC G4 500MHz processors are divided into two symmetric multi-processing (SMP) nodes, each operating as a dual MPC7410 processor SMP Linux system. In addition, each SMP node has: 4MBytes L2 Cache, 256MBytes dedicated, local SDRAM, a tightly coupled PCI mezzanine (PMC) slot, one PICMG 2.16-compliant Ethernet interface.
As the OS manages memory sharing and the Ethernet interfaces, the SMP node architecture seamlessly distributes multi-threaded applications across all the processors. Thus, this enables focus on customer applications and not interprocessor communication. As an example, for a high-touch packet application such as packet inspection, the local memory of the SMP nodes would receive off-board packets from the H.110 bus, process them according to a high-touch packet algorithm, then retransmit the packets off board.
Off-board transmission is conducted through the onboard PICMG 2.16 Ethernet interfaces or by special I/O cards populating the associated PMC slots, which can support eight Ethernet interfaces or other interfaces with a total data rate of OC3. Performance is further enhanced by Force's Linux support package with its optimization of data flow.
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