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Linux development board and BSP ships for multicore MIPS SoC

Nov 3, 2010 — by Eric Brown — from the LinuxDevices Archive — 19 views

NetLogic Microsystems has released a Linux development kit and board support package (BSP) for its MIPS-based eight-core XLP system-on-chip (SoC). The XLP Multi-Core Processor Development Kit includes a development board, software tools, libraries, drivers, and reference solutions, says the chipmaker.

The XLP Multi-Core Processor Development Kit integrates tools and components needed to create and deploy control- and data-plane applications, as well as design, test, and debug next-generation network infrastructure systems, says NetLogic Microsystems. The Linux BSP and development kit focuses specifically on the company's top-of-the-line XLP multicore processors (see farther below for backbground).

The XLP Multi-Core Processor Development Kit is said to include:

  • Production-ready development board
  • Reference schematics, models, and guidelines
  • Board design and layout guidelines, and reference Allegro layout files
  • Programmer's reference manual and datasheets
  • Full BSP, including Linux 2.6 64-bit operating system and NetOS data-plane environment
  • Full tool chain and debug environment
  • Bootloader/BSP and diagnostics
  • Libraries for accelerating compression/decompression, encryption/decryption, packet ordering, and I/O support
  • Demonstration and evaluation software and sample code
  • High-speed connectivity support, including Interlaken, XAUI, and SGMII, plus interface to NetLogic's knowledge-based processors

XLP background

The first XLP processor, NetLogic's XLP732, was unveiled last May. This superscalar, 40nm-fabricated addition to Netlogic's family of multicore MIPS64-based SoCs supports both data- and control-plane processing.

The XLP832 can mix eight "EC4400" cores clocked at 500MHz to over 2GHz, and offers three times the performance per Watt of its previous XLR SoCs, which were introduced in 2005, claims NetLogic.

Thanks to the four-way multithreading, four-issue superscalar engine and out-of-order execution of the XLP832 cores, the SoC provides 32 highly independent threads, says the company. Netlogic calls these independently addressable threads "nxCPUs."

XLP832 block diagram
(Click to enlarge)

The earlier XLR SoC integrates four or eight MIPS64 cores, clocked to 1.5GHz, and lack superscalar capability. A lower-end XLS family includes the dual-core 1GHz XLS208 SoC.

In July, NetLogic Microsystems announced a multi-core "solution" using its XLP architecture, and said it would soon introduce nine new XLP SoC models. Aimed at high-end networking applications, the Linux-ready XLP8128S platform integrates four eight-core XLP832 SoCs clocked at up to 2GHz and offers over 160 programmable processing engines, for up to 160Gbps throughput and 240 million packets-per-second (Mpps) processing, said NetLogic.

In September, Enea announced the release of a Linux configuration and build environment integrated with NetLogic's Linux software development kit (SDK), and made available free to customers using NetLogic's MIPS-based XLP, XLR, and XLS processors. Billed as "an intuitive and extensible Linux jump start kit," Enea's offering is said to incorporate graphical configuration, build, and debug tools.

It is unclear whether the Enea build environment is also part of the newly announced XLP Multi-Core Processor Development Kit.

Stated Chris O'Reilly, vice president of marketing at NetLogic Microsystems, "The combination of the industry's most advanced and highly differentiated multi-core processor along with a turnkey development kit gives us a strong leadership position in high-end multi-core communications processing well ahead of our competition."


The XLP Multi-Core Processor Development Kit appears to be available now, although it is now yet listed among the company's other hardware-based development kits, here. Pricing was unavailable.

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