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Linux ported to Metagence’s META RISC/DSP multi-threaded processor

Aug 26, 2003 — by LinuxDevices Staff — from the LinuxDevices Archive — 4 views

Embedded product designers building real-time entertainment and communication devices around Linux have a new processor platform to evaluate, as Imagination Technologies division Metagence has a Linux 2.4.18 kernel running on its single core, multi-threaded family of META processors. Metagence is claiming its port to be the first of Linux to a multi-threaded processor architecture.

META chips are programmable general-purpose RISC processors with integrated DSP. They feature on-die cache and a memory management unit (MMU) that open the door to running actual Linux, complete with virtual memory support, and not just uCLinux (a version of Linux adapted for microcontrollers without MMUs).

Metagence claims its META family of processors deliver true hardware multi-threading, providing the familiar development environment, applications, and device drivers of Linux on a device with complex DSP and multimedia capabilities, real-time operation, and low power consumption. The most demanding real-time embedded applications, claims Metagence, can be built around its META chips running Linux. The company notes that consumer products involving digital radio and digital TV have already been built around META chips.

Solving the Linux / DSP Problem

According to Metagence, META can run Linux on one hardware thread while running real-time DSP tasks on the other threads. The company notes META can also re-allocate processor instructions on the fly so that each thread can be delivered the guaranteed share of processing resource and response time that it needs, while never clocking the processor faster than is required. And, because everything is on one core, synchronization and communication between the tasks is supported within the processor architecture in the instruction set, which makes it efficient and easy to implement, Metagence claims.

Metagence distinguishes its approach from solutions such as TI's OMAP that “throw in processors til it works.” The company says a fine-grained scheduler allocates processing resources between multiple hardware threads. This is done dynamically in hardware by a patented “Automatic MIPS Allocation” system, the company says. Because this isn't done by a “hard split” of the problem across multiple cores, the resources can be reallocated quickly to accomodate new functionality or simply to adapt as the usage profile of the device changes, the company claims.

Metagence claims the following software engineering advantages for its single-core, multi-threaded approach:

  • single common architecture (easier to learn, a single tool chain, and functions can move between threads during development if required)
  • Real time problems are easy to solve
  • MIPS, DSP resource, cache and memory can be easily reallocated.
  • Communication between hardware threads is formalised and efficient rather than relying on things like hard-wired interrupt lines, back-to-back serial ports, fifos and dual-ports.

The company touts the following as advantages of the system-on-chip approach:

  • One architecture can address any required system design. Designing a multi-core chip requires that issues such as cache, memory architecture, inter-processor comms, booting, debugging, etc. are all designed, often from scratch and as a one-off based on the processors being used in that particular case and how they are being used.
  • The multiple hardware threads make excellent use of the processor resource, which keeps power and clock rate down. (Multiple hardware threads are an excellent way to get lots of MIPS per MHz, which is why desktop processors are going this way.)

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