The Open Graphics Project's long-awaited open source graphics card is ready for order by developers. Designed by Traversal Technology, the OGD1 boasts an open source hardware design based on a Xilinx Spartan-3 XC3S4000 FPGA, and is intended as an FPGA development platform, says the OGP.

(Click for larger view of the OGD1)

The Open Graphics Project announced its plan back in 2005 to develop a basic graphics card with an open source hardware design. A central goal of the OGP is to streamline driver development, since binary drivers from graphics manufacturers are typically difficult to work with. The group hopes eventually to release a commercial version suitable for consumers.

Meanwhile, the $1,500 “Revision B” of OGD1 is a “blank” system intended for developers interested in building upon the work done so far. The hardware was developed by Traversal Technology and the closely-aligned OGP, with support from the OGPs non-profit support organization, the Open Hardware Foundation. OGP Founder Timothy Miller and his partners at Traversal, Andy Fong and Howard Parkin, boast a combined 30 years of hardware design experience, including developing graphics hardware for air traffic control and military installations, they say.

To take advantage of the OGD1, developers should be “familiar with HDL programming and FPGA logic design, and have access to their own FPGA programming tools,” says the OGP. The board offers only basic diagnostic logic, but the group is working on “basic functional logic OGD1, Verilog module skeletons, examples, and extended documentation,” it said.

The OGD1 combines the Xilinx Spartan-3 FPGA and a Lattice LFXP10 FPGA that bootstraps the Spartan. It is equipped with 256MiB of DDR graphics RAM. (MiB stands for Mebibyte, the formal name for 1,048 bytes, whereas MB stands for Megabyte, which technically sums up to only 1,000 bytes.) The OGD1 also offers dual DVI connectors, a 64-bit PCI-X connector, and S-Video and composite outputs, and is said to follow the DDC, EDID, DPMS, and VBE VESA standards. The RoHs-compliant system uses passive cooling and draws approximately 20 Watts, says the OGP.

OGD1 diagram
(Click to enlarge)
The OGD1's design schematics, FPGA logic, and additional hardware details, including all RTL (Register Transfer Level) descriptions are freely available on the Traversal site, says the group. Source code to the device drivers and BIOS will be released under the MIT and BSD licenses. The RTL (in Verilog) used for the FPGA, and the RTL used for the ASIC, will be released under the GNU General Public License (GPL).

Specifications for the OGD1 include:

• Xilinx Spartan-3 XC3S4000 FPGA
• Lattice LFXP10 non-volatile FPGA
• 256 MiB DDR400 (200Mhz) graphics memory; 128-bit memory bus
• Philips TDA8777 Triple 330Mhz 10-bit video DAC
• Conexant CX25874 video encoder
• PCI/PCI-X (33/64-bit, 33-133MHz) card edge
• 2 x DVI dual link video outputs (up to 2560 x 1600 resolution @60Hz)
• 4 x Silicon Image SiI178 DVI transmitters
• S-Video and composite video outputs
• RGB analog video output (up to 2048 x 1536 resolution @70Hz)
• 66 user I/O signals on a 92-pin Hirose connector
• 68 user I/O signals on an available 100-pin IDC connector
• Dimensions — 6.875 x 4.2 inches
• Power consumption — ~20 Watts

Availability

The OGD1 is available for order now for $1,500 (or $1,400 for the first 100 orders). Manufacturing will begin once 100 orders have been received, says the group. More information may be found here.

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