News Archive (1999-2012) | 2013-current at LinuxGizmos | Current Tech News Portal |    About   

Sub-$10 ARM9 SoC runs Linux, boasts fast data transfers

Dec 18, 2006 — by LinuxDevices Staff — from the LinuxDevices Archive — 4 views

Atmel is shipping a low-cost embedded processor claimed to offer more bandwidth than other ARM9 chips, thanks to parallel buses and distributed DMA. The AT91SAM9263 targets data- and graphics-intensive applications, and is available with an AT91SAM9263-EK evaluation board that supports Linux.

According to Atmel, ARM9-based processors typically max out at 20 Mbps, due to load/store instructions that require at least eighty CPU cycles to transfer a single byte of data between a memory and a peripheral. The AT91SAM9263, in contrast, only uses a claimed 12 percent of its processor cycles during 20 Mbps transfers, and is said to have a total on-chip data transfer bandwidth of 41.6 Gbps.

Atmel credits the AT91SAM9263 SoC's throughput capabilities to its inclusion 27 DMA (direct memory access) channels — including 18 “simple, silicon-efficient, single-cycle,” peripheral DMA controllers, and five DMA controllers that support burst mode data transfers to the USB host.

The chip also features a nine-layer bus matrix, two additional buses for tightly-coupled-memories (TCMs) used for data and instructions, and two external bus interfaces (EBIs) that support gigabyte-plus external memories.

AT91SAM9263 architecture diagram
(Click to enlarge)

The AT91SAM9263 is based on an ARM926EJ-S core running at 200MHz, with a 100MHz system bus. The SoC integrates an impressive variety of on-chip peripheral interfaces, in combinations aimed at the following specific device applications:

  • Human interface — Camera, TFT/STN LCD controller, 6-channel AC97 audio, I2S, and a 2D graphics co-processor
  • Networking and communications — 12 Mbps USB host and device, 10/100 Ethernet MAC, and a 1 Mbps control area network (CAN), along with four USARTs, two 50Mbps SPI interfaces, CompactFlash, SDIO (MCI), and a two-wire interface (TWI) for connection GPRS, WiFi, and other external wired and wireless communication modules
  • Mass Storage — USB host, SD/MMC memory card interface (MCI), and dual external bus interfaces supporting SDRAM, NAND Flash with error code correction (ECC), and CompactFlash/TruIDE for GByte-plus on-board or removable memory such as USB sticks, CompactFlash hard disks, and memory cards

Additional touted features include:

  • Eleven-layer Bus plus 96 kBytes on-chip SRAM; “great for Internet radio, GPS navigation, and other time-critical data-intensive applications”
  • 11 buses and 96 Kbytes of on-chip scratchpad SRAM that can be partly configured as tightly-coupled data and instruction memory (TCM); The buses provide multiple parallel on-chip data transfer channels and a total on-chip bandwidth of 41.6 Gbps
  • Seven dedicated buses run between the DMA controllers of the Ethernet MAC, USB host, camera interface, LCD controller, 2D-graphics co-processor, 2-channel memory to memory DMA controller, and 18-channel peripheral DMA controller (PDC) and on- and off-chip memory
  • Two additional buses, one for data and one for instructions, connect the processor with the tightly coupled memories
  • Two more buses connect the instruction and data cache controllers to the memories; once the memory address and block size are configured, the DMAs transfer data automatically, with no additional programming required, Atmel claims
  • Dual external bus interface allows simultaneous, parallel operation of the ARM9 CPU and graphics processors
    • One EBI has dedicated buses to the on-chip 2D graphics co-processor and to the LCD controller
    • The second EBI “eliminates the need for the LCD controller and CPU to share memory, and can increase available CPU MIPS by 20-40 percent,” Atmel claims

  • “Comprehensive” suite of system and power control functions:
    • Includes a main oscillator, two phase lock loops (PLLs), watchdog timer, two real-time timers, reset controller (RSTC), two power on reset units, 8-level priority Interrupt controller (AIC), shutdown controller (SHWDC), four pulse width modulators (PWM), and a periodic interval timer (PIT)
    • System clock frequency is scalable and peripheral clocks can be enabled and disabled all under software control, optimizing dynamic power consumption to system requirements, Atmel says
    • Whenever the main-supply shuts down, an on-chip power switch automatically switches power from main supply to the backup battery. In battery-backup mode the current drain is claimed to be only 5uA


The AT91SAM9263 is available now, in a 324-ball BGA package. It is priced below $10 in 100K quantities.

Also available is an AT91SAM9263-EK Evaluation Kit that supports both Linux and Windows CE. It comes with bootloader source code and schematics.

This article was originally published on and has been donated to the open source community by QuinStreet Inc. Please visit for up-to-date news and articles about Linux and open source.

Comments are closed.