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Via readies Pentium M killer

May 27, 2005 — by Henry Kingman — from the LinuxDevices Archive — views

Via's next-generation x86-compatible processor will start production in an IBM facility in Q2, Via says. Via calls the C7 “the world's smallest, lowest power, and most secure native x86 processor.” It targets thin and light notebooks, mini-PCs, green clients, personal electronics, and high-density servers and appliances.

According to Via, the C7 processor was designed from the ground up for low power and footprint, by Via's Austin, Texas-based Centaur division. It is being manufactured on 90nm SOI (system-on-insulator) process technology at an IBM plant in East Fishkill, New York. Taiwanese fab TSMC will continue to produce Via's older chip designs, and will be considered for future chips, Centaur President Glenn Henry told LinuxDevices in a June, 2004 interview.

Via says that IBM's manufacturing technology “permitted unprecedented levels of integration, providing the basis for significant performance boosts within industry-leading power and thermal profiles.” The C7 draws as little as 100mW (0.1W) when idle, and has a peak power rating of 20 Watts at its initial maximum clock speed of 2GHz — 40 percent cooler than competing solutions, Via says.

TDP (total/thermal design power) maximum power ratings of C7 at various clock speeds

Via claims that the C7 outperforms Intel's Pentium M processor in benchmarks normalized to the performance/TDPmax of the 1.5GHz VIA C7-M processor.

Via says the C7 outperforms Intel's Pentium M processor in performance-per-Watt

The C7 also boasts a tiny die size — just 30 square millimeters. According to Via, the C7 offers 180 percent more “performance per unit area” than competing x86 processors.

The C7, in a nano-BGA package option, is considerably smaller than the C3

The C7 is built on Via's “Esther” core, which Henry calls “the embodiment of my vision for a cool, secure, and versatile processor that will take the X86 platform to the next level.” Henry adds, “It is the culmination of many years of designing for the optimal balance of mobility, performance, and security.”

C7 architecture diagram
(Click to enlarge)

The C7 has 128KB each of L1 and L2 on-die cache memory, and integrates Via's V4 bus interface, clocked at 800MHz. Via calls the bus “highly efficient,” and says it offers competitive write bandwidth and linear ordering modes.

The chip supports Intel's SSE2 and SSE3 multimedia extensions, and also integrates an expanded version of Via's PadLock Hardware Security Suite. The PadLock Suite provides on-die hardware acceleration of key cryptographic operations, which according to Via ensures performance and efficiency many times that available in software, yet with negligible impact on processor performance.

Like previous Via chips equipped with the PadLock Suite, the C7 includes an AES encryption engine, and Via's innovative RNG (random number generator) that gathers entropy from electrical noise in the chip itself. New in the C7's PadLock Suite are:

  • SHA-1 and SHA-256 hashing for secure message digests
  • A hardware-based Montgomery Multiplier supporting key sizes up to 32K, to accelerate public key cryptography such as RSA
  • Execute protection (NX), used in Microsoft Windows XP/SP2 to provide protection from malicious software such as worms and viruses

Via President Wenchi Chen said, “With the rest of the market moving towards low power, heat-efficient processor design, and distributed platforms, the industry is clearly starting to follow the direction we have been championing for many years. The VIA C7 processor will underpin our next generation platforms and enable us to maintain our leadership in driving the next wave of platform innovation.”

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