Embedded Processor and System-on-Chip Quick Reference Guide
Dec 10, 2001 — by Rick Lehrbaum — from the LinuxDevices Archive — 117 viewsOne oft-touted advantage of Linux is that it supports so many processors. Unlike the Wintel PC world, the world of Linux-based devices is characterized by a dazzling diversity of CPUs — so varied that it's difficult to fathom the breadth and depth of coverage.
For example, a form of Linux (uClinux, now a compile-time option) can run on MMU-less processors. And, there are now several instances of Linux running natively on DSPs (digital signal processors).
Add to this the availability of plug-and-play silicon IP (intellectual property) and customizable function cells that developers can use to create application-oriented chips based on off-the-shelf processor cores, and the number of highly integrated and efficient silicon subsystems that can run Linux starts to look nearly infinite. Increasingly, application-oriented system-on-chip (SoC) processors target specific device categories, resulting in set-top-box processors, mobile phone processors, portable media device processors, and so on.
In light of the extraordinary diversity and fast pace of development of these chips, LinuxDevices.com has created this Quick Reference Guide to embedded processors and system-on-chip ICs, which we hope will assist you in pinpointing solutions that match your embedded Linux based system requirements.
Please note that this guide will be updated frequently, so be sure to check back periodically for the latest info. Also, be sure to take advantage of the abundant information available via the LinuxDevices.com search engine, which will turn up much additional information about SoCs that run Linux.
This guide is organized by processor architecture:
Altera Excaliber — Oct. 15, 2001 — The Excaliber family of embedded processor programmable logic devices (PLDs) include ARM922T processor cores as well as Altera's Nios soft core embedded processor. programmable logic, on-chip memory, and key peripherals. They support up to 38,400 logic elements. details
Aplio/TRIO — Jun. 12, 2000 — 20 MHz ARM7TDMI CPU (no MMU) along with a pair of 40 MHz DSPs, plus dual serial ports, 23 digital I/O, SPI, two CODECs, 10/100 Ethernet, USB, and Flash memory interface. The DSPs and CODECs provide software modem, audio, and voice functions. Built-in boot ROM. details
Atmel AT75Cxxx — June 17, 2003 — An ARM70-based chip used in the 7Chips EVA (“easy VoIP appliance”) (details) and in IP phone reference designs. details
Atmel AT91RM9200 ARM920T — Sep. 15, 2004 — This 180Mhz SoC is based on an ARM920T core, with 16KB I-Cache and 16KB D-Cache. Supported by Linux tools from Microcross (details) and RTEMS tools from Cogent. details
Atmel Fast VirtualNet AT76C504/505/506 — Aug. 21, 2002 — Single chip baseband Media Access Controllers (MAC) supporting PCMCIA or Compact Flash, USB, and PCI or mini-PCI. Include an interface to RF Micro Devices (RFMD) front-end chipsets, and target printers, PDA's, and calculators. details.
Atmel SAM7S series — Oct. 20, 2004 — Priced between $3 and $4, Atmel's 32-bit SAM7S-series SoCs target the 8-bit microcontroller (uC) market, where Atmel says they can offer better real-time performance and “secure operation functions” such as watchdog timers. The question is, though: will they run Linux? details here and here
Centrality Atlas — Apr. 18, 2003 — An ARM9 based ultra-integrated SoC targeting wireless and GPS-enabled smartphones, PDAs, and automotive navigation/telematics systems. Integrates a communications/control DSP, LCD controller, Bluetooth, and GPS baseband controllers (external RF circuits required), digital camera interface, and a long list of peripheral control and system expansion interfaces. details
Cirrus Maverick EP7312 — Oct. 12, 2000 — 18-74 MHz ARM720T with 48 KB internal SRAM, SDRAM external memory interface, built-in audio decoder with decompression capability, 27 digital I/O, dual 16550 UARTs, IrDA, synchronous serial port, an LCD display controller, and built-in ROM. Very low power consumption, typically 94 mW at 74 MHz. details
Cirrus CS89712 — Oct. 31, 2000 — An Internet communications device with a 74MHz ARM720TDMI core, 10Mbps Ethernet connectivity (MAC and PHY), built-in LCD controller, plus a wide array of internal peripherals. details
Cirrus Maverick 9301 — Feb. 20, 2004 — Includes MaverickKey DRM tool and MaverickCrunch math coprocessor. Speeds of up to 166 MHz, integrated 1/10/100 Base-T Ethernet media access controller (MAC), and two USB 2.0 host ports. details
Cirrus Maverick EP9302 — May 18, 2004 — A low-cost, highly integrated processor based on the ARM9 architecture and targeting point-of-sale terminals, medical instrumentation, security and surveillance, process monitoring, and digital entertainment, the EP9302 runs at 200 MHz and includes a “MaverickCrunch” engine, described by Cirrus as “an advanced, mixed-mode math coprocessor that greatly accelerates the single- and double-precision integer and floating-point processing capabilities of the ARM920T processor core.” details
Cirrus Maverick EP9307 — Oct. 13, 2004 — A highly integrated SoC (system-on-chip) for cost-sensitive networked applications, the $13 EP9307 is based on a 200MHz ARM9 core, with integrated graphics, audio, network, and a host of other interface controllers. It comes with Linux. details
Cirrus Maverick EP9312 — Jun.12, 2000 — 200 MHz ARM920T along with a specialized coprocessor for processing digital audio, plus interfaces for dual IDE hard drives, 10/100 Ethernet, serial port, triple-USB (host), LCD display, keypad scan, I2S audio bus, touch, and digital I/O. Built-in boot ROM. details
Cirrus Logic EP9315 — Feb. 24, 2004 — Includes MaverickKey DRM tool and MaverickCrunch math coprocessor. Speeds to 200 MHz, with integrated Ethernet MAC, PCMCIA support, two-channel IDE, and three USB 2.0 hosts. Supports an 18-bit display, touchscreen, and keypad, and has a separate graphics accelerator. The EP9315 also supports multiple audio solutions, up to six channels I2S 24-bit audio, and can encode and decode industry-standard audio algorithms such as AAC, MP3, and Windows Media Audio. details
Freescale DragonBall MX1 — Aug. 19, 2002 — Motorola's first ARM-based DragonBall product, targets wireless mobile devices. Based on an ARM920T core up to 200 MHz. Integrates a Bluetooth ready applications processor. Details here and here
Freescale MC9328MX1 i.MX1 and i.MXL — Nov. 17, 2003 — Based on an ARM920T core with 16KB instruction and 16KB data cache, and very lower power requirements. Targets mobile devices. Integrates SDRAM controller, LCD interface, video port, dual UARTs, dual SPI ports, USB device port, I2C bus, general purpose I/O, and memory card interfaces, among other peripherals. The iMXL includes a subset of the i.MX1's built-in functions. Details here, here, here and here.
Freescale i.MX21 (MC9328MX21) — Jul. 8, 2004 — Based on a 266-400MHz ARM926EJ-S core, with “Jazelle” Java acceleration, MPEG-4 and H.263 encode/decode acceleration, 3D graphics support through an external bus master interface, 16/18-bit color LCD controller with up to VGA resolution, 4 UARTs, IrDA, AC97 host controller, and USB On-The-Go. Supports dual-slot MMC and SD/SDIO card interface, PCMCIA. Enhanced security features including high assurance boot, security controller, hash accelerator, and memory management. NAND Flash controller. Fabbed in a 0.13 �m process and packaged in 289 ball, 0.65 mm pitch MAPBGA. Details here and here
Intel XScale — Aug. 23, 2000 — Intel's XScale chips include cores implemented by Intel, based on an architecture license of ARM Ltd.'s ARM9 instruction set. They also include on-chip system components for specific applications. Linux-friendly XScale chips include:
- Intel XScale IOP321 — Feb. 27, 2002 — Intel's fifth generation I/O processor, but first to use an XScale core. Also includes a PCI-X interface. Targets storage, networking, and embedded applications require fast I/O throughput. details
- Intel XScale IXC1100 — Sep. 18, 2003 — A control-plane processor supporting compute-intensive tasks such as deep packet inspection on line cards and blades. Targets telecommunication equipment such as multi-service switches, VoIP media gateways, and wireless infrastructure. Details here and here
- Intel XScale IXP2325 and IXP2350 — Oct. 19, 2004 — The XScale IXP2325 and IXP2350 are built on 90nm technology, and target access and edge networking applications that use a single chip for both data plane and control plane processing, Intel says. details
- Intel XScale IXP28xx — Sep. 16, 2003 — Intel's IXP2800 network processor is meant for network core applications, such as ultrahigh-speed switch/routers; its IXP2400 network processor is meant for multiservice switches and similar equipment at the network edge; and, its IXP2850 is meant for virtual private networks (VPNs), secure web services, and storage area networks (SANs). Details here, here, here, and here.
- Intel XScale IXP425 — Dec. 11, 2003 — Intel's IXP425 network processor supports pure communications applications with a wide range of speech, video, and data options using Universal Test and Operations PHY Interface for ATM (UTOPIA), DSL, High Level Data Link Control (HDLC), and the IEEE 802.11x standard for wireless networks. Integrated voice compression and InfoLAN, InfoWAN, and InfoUSB interfaces is provided. details
- Intel IXP460 and IXP465 — Oct. 19, 2004 — The IXP46x family targets industrial automation, as well as communications and embedded networking devices for small-to-medium enterprises (SMEs). A development board and Linux support package (LSP) are available for the chips. The IXP460 supports up to two 10/100 Ethernet MACs (with MII/SMII interface), whereas the IXP465 supports up to six 10/100 EMACs with SMII interface, or three with MII interface. The IXP460 also supports IEEE1588 hardware assistance for time synchronization in distributed control systems containing multiple clocks. details
- Intel XScale PXA25x — Mar. 25, 2003 — The 400 MHz PXA255 replaced the PXA250 in March of 2003, offering enhanced performance and extended battery life. It is popular in many PDAs that run Linux and other handhelds. details
- Intel XScale PXA26x — Mar. 25, 2003 — Includes the PXA263 processor, the “first stacked processor” for PDAs, and the PXA260 processor, a pin-compatible upgrade. details
- Intel XScale PXA27x — Jun. 2, 2004 — Codenamed “Bulverde,” these chips features “Wireless MMX” and “Quick Capture” technologies aimed at graphics-rich applications such as personal media players, navigation devices, and handheld POS terminals. Available in speeds of 312MHz, 416 MHz, and 520 MHz, with support for advanced power management. details
Intersil ISL3893 WiSOC — Apr. 10, 2003 — An ultra-integrated ARM9 based controller targeting WiFi access points and routers compliant with 802.11a/b/g standards. Integrates dual MII interfaces, for either single- or multi-port Ethernet PHYs. Available with a reference design that runs Linux. details
LinkUp Systems L7205 — Jun. 12, 2000 — 74 MHz ARM720T CPU (no MMU) along with a DSP coprocessor, dual LCD controllers (one mono, one mono/color), two high speed (“Bluetooth ready”) UARTs, two synchronous serial ports for audio codec or SPI, USB (host/device), RTC, watchdog timer, and 52 digital I/O. details
NEC MPCore — May 17, 2004 — NEC's MPCore chips have a multi-core architecture co-developed with ARM Ltd. They support clock rates from 335 to 550 MHz, and include between one and four cores based on ARMv6 architecture and the ARM11 instruction set. They support Linux in both symmetric and asymmetric multiprocessing configurations. Details here and here
NeoMagic MiMagic 3 — Jun. 27, 2002 — 110 MHz ARM 720T CPU (with MMU) with on-chip 1K boot ROM and interfaces for SD Card, MMC, CompactFlash, SmartCard, USB (host/function), 3 high-speed UARTs, IrDA, AC-97, UCB1200, color/mono LCD, power management control, plus various timer/counters, RTC, IRQ inputs, GPIOs. details.
NETsilicon NS9360 — Oct. 13, 2004 — A low-cost one-chip network device SoC (system-on-chip) due in March, 2005, priced between $11 and $16 in 10K quantities. Based on a 200MHz ARM9 core, with an LCD controller and networking. Targets cost-sensitive, space-limited applications. details
NETsilicon NET+ARM — Jun. 12, 2000 — 40MIPS ARM7TDMI CPU (no MMU), plus 10/100 Ethernet, 2 high-speed sync/async serial ports with HDLC and SPI support, four IEEE-1284 parallel ports, and 24 digital I/O. details
NETsilicon NET+50 — May 7, 2004 — The Net+50 includes a 44MHz ARM7TDMI microprocessor core with 8KB of on-chip cache, integrated 10/100BaseT Ethernet MAC with an MII interface, a distributed 10-channel linking DMA controller, and a memory controller supporting all of the popular memory devices in use today. It is supported by a uClinux-based SDK (software development kit) from NetSilicon. details
Nvidia MediaQ Katana — May 15, 2003 — ARM922T based chip family targeting multimedia-enabled smartphones. The baseline MQ9000 integrates embedded memory, 320 x 480 color graphics controller for S-STN and TFT LCDs, NAND controller, CCIR656-compliant camera interface, three serial ports, and interfaces for USB, 4-bit SDIO, and a keypad. Also includes dedicated hardware acceleration for 64-bit 2D Graphics, MPEG-4 post processing, and Java. The MQ9100 and MQ9150 add hardware JPEG compression. details
Oki Advantage ML67406x and ML67405x — Mar. 10, 2005 — Powered by a 33MHz ARM7TDMI core with legacy 8- and 16-bit support. Includes an array of serial communications interfaces, including multi-master I2C, SPI, I2S, and 9-bit UARTs enabling communications with legacy 8-bit MCU devices. The 405x series adds an external 8-/16-/32-bit data bus, enabling it to support enough external Flash and RAM to run uClinux. details.
Oki Advantage ML696200 and ML69Q6500 — Oct. 20, 2004 — Oki's first general-purpose ARM-based SoCs. The 6200 series is a general-purpose ARM9 SoC targeting USB 2.0-based consumer peripherals and ATA/Flash storage devices. The 6500 series adds sound and targets hard drive-based audio player and recording applications. details
Protocom PR818 — Jan. 8, 2004 — Claimed to be the world's first MPEG-4 CODEC chip, this single chip SoC integrates an ARM 922T processor core and is supplied with Linux. A more horizontal solution than previous MPEG iterations, MPEG4 is a capture format as well as a compression format. The chip targets consumer electronics and military devices that capture and display high quality video. details
Samsung S3C2400/2410 — July 29, 2002 — A 16/32-bit ARM920T RISC microprocessor targeting handhelds. Integrates separate 16KB Instruction and 16KB data caches, MMU, LCD controller (STN & TFT), NAND Flash Boot loader, and more, and is available with a CF/USB/audio chip and Linux implementation from Esfia. more
Samsung S3C2440 — July 21, 2003 — A 533MHz ARM920T 16/32-bit RISC microprocessor core targeting PDAs, smartphones, and mobile handheld devices. On-chip interface functions include a camera interface, a display controller for TFT and STN LCD displays, an SD/MMC/SDIO card controller, USB host and device controllers, a touch-screen interface, and a NAND Flash interface and boot loader. details.
Samsung S3C2800 DTV CPU — Jan. 12, 2004 — This chip, along with the S5H2010 MPEG-2 decoder, comprises a two-chip platform for digital televisions. Together, the chips provide a 200 MHz ARM9 32-bit RISC processor core, a single-HD capable MPEG-2 decoder, transport demultiplexer, 2D graphic engine, display processor engine, NTSC/PAL encoder, smart card interface, and PCI. details
Samsung S3C44B0X — July 29, 2002 — A 66 MHz 16/32-bit ARM7TDMI RISC microprocessor targeting handheld devices. It integrates 8KB cache, optional internal SRAM, LCD controller, 2-channel UART with handshake, 4-channel DMA, and more, and is available with a CF/USB/audio companion chip and Linux implementation from Esfia. details
Samsung S3C4510B — May 2, 2003 — A 50 MHz SoC based on an ARM7TDMI core. Available on a Net-start evaluation board pre-installed with uClinux from Wiscore. details.
Sharp LH7A400 “Bluestreak” — Aug. 23, 2003 — Based on a 32-bit ARM9TDMI core (with MMU). Includes a color LCD display controller, plus glueless interfaces to SRAM/SDRAM/Flash, MMC, PCMCIA/CF, and Smart Cards. Also provides USB, 3 UARTs, synchronous serial, an AC'97 Codec Interface, and parallel I/O. Details here, here, here, here, here, here, here, and here
Sharp LH7A404 — Feb. 20, 2004 — A highly integrated 200MHz ARM922T-based 32-bit targeting mobile, industrial, and entertainment applications. Includes USB host, touch screen controller, programmable LCD controller, ATD controller, memory media interfaces, DMA controller, serial and parallel ports, Infrared support, counter/timers, real-time clock, watchdog timer, and an on-chip PLL (phase lock loop). details
Sigma Designs 85xx — Feb. 26, 2004 — These highly integrated, ARM7 based SoCs appear in more than a million IP-set top boxes and DVD players running uClinux, according to Sigma. details
STMicroelectronics “Nomadik” — Feb. 3, 2003 — A dual-core SoC with a 350-500MHz ARM926 core and programmable “smart accelerators” for video and audio coding functions. Uses OMAPI interface standard. details
TI DM342 — May 7, 2004 — A dual-core programmable digital media processor with a low-power C54x DSP core, an ARM926 RISC processor, plus video and imaging coprocessors. details
TI OMAP730, OMAP732 — Feb. 3, 2003 — These SoCs combine a TI GSM/GPRS modem baseband subsystem with a dedicated application processor. They use the OMAPI interface standard. details
TI OMAP1610, OMAP1611, OMAP1612 — Feb. 3, 2003 — Cores that can be coupled with chipsets for cellular standards and used in mobile phones. Supports OMAPI interface standard. details
TI OMAP2410 and OMAP2420 — Feb. 23, 2004 — The first OMAP2 (open mobile application processor 2) SoCs target 2.5/3G mobile handsets. The OMAP2410 includes an ARM1136JS-F core, a TI programmable DSP, a 2D/3D graphics accelerator, integrated camera interface, DMA controller, and more. The OMAP2420 adds a programmable imaging and video accelerator supporting 4 megapixel still capture applications, full-motion video encode or decode, and TV out. details
Texas Instruments OMAP5910 — Dec. 9, 2002 — Integrates a TMS320C55x DSP core with a TI-enhanced ARM925 core, for the low power real-time signal processing capabilities of a DSP coupled with the command and control functionality of an ARM. Also integrates 192 KB RAM, USB 1.1 host and client, MMC/SD card interface, multi-channel buffered serial ports, real-time clock, GPIO and UARTs, LCD interface, SPI, uWire, and i2s. Details here, here, here, here, and here
Texas Instruments OMAP5912 — Mar. 29, 2004 — A multi-core ARM + DSP SoC targeting portable data terminals. Integrates an ARM9 applications processor core, TI's TMS320C55x DSP core, USB “on the go” support, a dual camera interface, display capability, and a hardware encryption engine. details
Texas Instruments TCS2600 — Mar. 3, 2003 — A three-chip set for secure GPRS smartphones. Includes TI's OMAP730 smartphone SoC, which integrates an ARM926 based core with TI's Class 12 GPRS modem processor. Also includes TI's TWL3016 analog baseband processor and TI TRF6151 direct conversion, quad-band RF transceiver. details
Texas Instruments TCS3500 — Jan. 20, 2004 — A reference design chipset for EDGE-enabled GSM/GPRS handsets. Includes an OMAP850 processor integrated with a quad-band EDGE modem. Also includes a TWL3027, which integrates an analog baseband with power management and an audio codec, and the BRF6150 single-chip Bluetooth solution. Optional modules include the TGS5000 assisted GPS and the TNETW1230 WLAN chips. details
Texas Instruments TMS320DM310, TMS320VC547x, and TMS320DA180 — Jan. 8, 2004 — “Digital media processors” integrating a general purpose CPU, a C54x DSP, and numerous peripheral interfaces. details
Texas Instruments TMS320C547x — Dec. 7, 2001 — Dual-core processors based on a 100 MHz TI TMS320C54x DSP (100 MIPS performance) along with a 47.5MHz ARM7 Thumb RISC processor, plus built-in 10/100 Base-T Ethernet, general-purpose I/O, dual UARTs, SPI and I2C ports, and other logic. Details here and here
Toshiba T6TC1XB-0001 — Apr. 21, 2003 — A 150MHz ARM926EJ-S chip for networking devices. Integrates ual Ethernet MACs and controllers for PCI bus, distributed DMA, and SDRAM memory interface. The first in Toshiba's “SocMosaic” program, the chip can serve as the template for customized derivatives with a six-month turn-around time. details
Triscend A7 CSoC — Sep. 18, 2000 — 60 MHz ARM7TDMI CPU (no MMU), plus two UARTs, watchdog timer, parallel I/O, plus up to a 40,000 gate area that provides as many as 3,200 user-programmable function cells which may be used to implement a wide variety of functions including display, interface, and logic. details
ATI Xilleon — Oct. 17, 2001 — The ATI XILLEON 220 includes a 300MHz MIPS core with MMU, along with MPEG decoder, audio decoder, display engine, 2D/3D graphics engine, conditional access, transport demultiplexers, PCI bus, USB, and hard disk interfaces. It targets digital STBs and DTVs. Details here, here, here and here
Alchemy Au1000 — Jun. 12, 2000 — 200-500 MHz 32-bit MIPS CPU along with an R4000 MMU, plus two 10/100 Ethernet controllers, four UARTs, USB (host/device), IrDA, AC'97 controller, I2S audio bus, two SPI/SSI interfaces, and 38 digital I/O. details
Alchemy Au1100 — Apr. 7, 2002 — Up to 500 MHz MIPS32 CPU along with controllers for LCD, 10/100 Ethernet, 3 UARTs, USB (host/device), IrDA, AC97, I2S audio, 2 SSI, 2 secure digital, PCMCIA, and 48 GPIO. details
Alchemy Au1200 — Jan. 3, 2005 — A highly integrated SoC targeting PMPs (personal media players), the Au1200 includes a 333, 400, or 500MHz MIPS32 core, along with large number of on-chip peripheral interfaces, and hardware accelerators for media processing, security, and more. Also features an advanced graphics controller that can scale DVD-quality graphics up to XGA resolution. Available with a Linux-based PMP reference design from FIC. details
Broadcom Second-generation SiByte family — Oct. 6, 2004 — Dual- and quad-core MIPS64 chips targeting networking, communications, and high-density computing. The dual-core BCM12xx series includes the BCM1255 and the SPI/Hypertransport equipped BCM1280. The quad-core BCM14xx series includes the BCM1455, and the SPI/Hypertransport-equipped BCM1480. details
Broadcom SiByte — Sep. 14, 2002 –Broadcom's SiByte family includes the BCM1250, based on dual MIPS64 CPU cores and designed for use in both control plane and data plane applications across Local Area Network (LAN), Metropolitan Area Network (MAN), and Wide Area Network (WAN) environments (details); and the BCM112x highly integrated, single-core MIPS64 processors targeting high-volume, cost-sensitive segments within next generation networking, wireless communications, storage equipment, server/web appliance and printer/imaging markets. details
Broadcom Sentry5 — Jun. 17, 2003 — Intended for “secured switch” applications such as gateways and routers, these MIPS-32 based SoCs feature hardware-accelerated security along with fast Ethernet switching, and are supported with embedded Linux software development kits. The family includes the BCM5365, BCM5365P, BCM5830, and BCM5834. details
Cavium Octeon CN34xx and CN38xx — Sep. 12, 2004 — A multicore network security processor for integrated network processing devices. Based on cnMIPS64 (“Cavium Networks MIPS”) cores, of which the CN34XX has 2-4 and the CN38XX has 8 – 12. Also integrates PCI-X or SPI, up to 8 Gigabit Ethernet, support for up to 16GB of 400MHz DDR ECC RAM, and a wide variety of configurable acceleration and security processing blocks. details.
IDT RC32438 — Jun. 30, 2003 — The 266MHz “interprise comm processor” is a 32-bit MIPS RISC based SoC targeting networking and access devices. It includes a DDR memory controller, PCI bus controller, two 10/100 Ethernet MACs, two 16550-compatible serial ports, and a 10 channel DMA controller. Details here, here and here
Infineon Technologies EasyPort — — A family of communications processors claimed to be the first network terminal controllers based on the MIPS64 5Kc architecture. details
Innova Card USIP — Sep. 20, 2005 — This MIPS32-based “USIP Professional IC” features on-chip memory, storage, and cypto, and is available with a Linux-based software stack, reference designs, and professional services. The SoC is based on a MIPS32 4KSd CPU core clocked at 96MHz, and is packed with peripheral interfaces. details
NEC EMMA and EMMA2 — Sep. 25, 2003 — NEC's “Enhanced MultiMedia Architecture” chips include a MIPs core with on-chip A/V decoders and MPEG-2 demux. They are used in many STBs based on the Multimedia Home Platform standard. details
NEC VR4181A — Jan. 21, 2002 — 131 MHz 64-bit MIPS CPU, plus interfaces for TFT/STN LCD display, dual CompactFlash, 3 UARTs, IrDA, I2C, 64 parallel I/O, RTC, watchdog timer, keyboard, USB, touch, audio I/O, and ISA-subset expansion bus. details
NEC VR4121 — Jun. 12, 2000 — 168 MHz 64-bit MIPS CPU, plus interfaces for CompactFlash (IDE), serial, parallel, RTC, keyboard, touch, and audio I/O, and ISA-subset expansion bus. Used in Casio Cassiopeia E-105. Details here and here
NEC VR4122 — Jun. 12, 2000 — 180 MHz 64-bit MIPS CPU, plus interfaces for CompactFlash (IDE), serial, parallel, RTC, audio I/O, and PCI expansion bus. details
NEC VR4181A — Jan. 21, 2002 — A 64-bit MIPS SoC integrating some 18 peripherals. Based on a VR4120A core with 157 DMIPS at 131 MHz with typical power consumption of 500mw. Targets portable devices, industrial applications, automotive communications, and telematics applications. Details here and here
NEC VR5432 — May 20, 2004 — These 200MHz 64-bit MIPS RISC microprocessors are supported by “RockHopper” development boards. They target network routers and switches, Internet appliances, and color imaging products. They feature a 32-bit external bus, a dual-issue superscalar architecture, multimedia extensions, floating-point capability, a 64 KB on-chip cache and a 64-bit internal data bus. details
NEC VR5500 — May 20, 2004 — An 800MHz 64-bit MIPS microprocessor core, code named Sapphire, based on NEC's 64-bit out-of-order superscalar microprocessor architecture. Features power consumption of 2W while executing 1200 Dhrystone MIPS at 600 MHz. Targets high-end multimedia and networking applications. Details here and here
NEC VR5701 — June 18, 2004 — A MIPS based core clocked at 266 or 333MHz, integrating standard PC/AT peripherals, and used in extremely small T-Engine compatible devices. details
Oak Technologies Generation — Jan. 8, 2003 — A MIPS64 based SoC targeting digital media applications, the Generation9 includes an integrated audio DSP and Video Signal Processor. Available with a reference design that runs Linux. details
PMC-Sierra RM11200 — Oct. 5, 2004 — A high-end, high-integration SoC (system-on-chip) expected Q2 2005. Dual 64-bit E11K MIPS cores, along with high-speed I/O, built on 90nm process technology. It will target networking, storage, and communications applications such as enterprise routers, storage systems, and DSLAMs (digital subscriber line access multiplexers). details
QuickLogic QuickMIPS ESP — Dec. 15, 2003 — The QuickMIPS ESP (Embedded Standard Product) family integrates a high-performance processor based on a MIPS32 4Kc core, with fully characterized, application specific functionality and a field programmable fabric for flexibility and differentiation. details
Toshiba “Donau” — Sep. 25, 2003 — A family of single-chip systems for digital TV that supports LinuxTV 2, a software stack from Convergence that supports the Multimedia Home Platform (MHP). Targets basic “zapping boxes” as well as high-end MHP-devices with hard drive storage. Based on MIPS TX49 RISC processor cores with up to 215 millions of instructions per second. details
Toshiba TMPR492x — Mar. 29, 2004 — The TMPR4925 and 64-bit TMPR4926 are available as part of a two-chip WVM49RX reference design for media gateways, IP STBs, and video endpoints. These TMPR492x chips include a memory controller, PCI controller, serial peripheral interface, UART, timer, and AC97 Codec. The TC86C001FG “GOKU-S” companion chip adds an I2C bus, USB host and device, and UDMA-66 IDE bus. details
Toshiba TX4925 — Nov. 19, 2001 — A 64-bit core with built-in Flash memory support, PCMCIA interface, PCI controller, and AC-Link controller. Targets broadband audio/video, Internet appliances, mobile applications, and residential security gateways, and is used in several Toshiba SoCs. details
Toshiba TX9956 — Jul. 7, 2004 — Toshiba America Electronic Components (TAEC) has added a chip at the top end of its “TX System RISC” line of general-purpose embedded processors. The 64-bit MIPS-based TX9956CXBG is the first Toshiba CPU based on 90nm process technology, and the first to use Toshiba's TX99/H4 core. It currently supports Linux and VxWorks, and targets multi-function printers and high-end set-top boxes. details
Toshiba TX7901 — Apr. 10, 2003 — A superscalar 64-bit MIPS SoC targeting media- and network-centric consumer devices. Available with a companion chip and Linux based reference design. Details here and here
AMCC 440GR — Mar. 17, 2004 — A low-power SoC targeting networking and storage. Based on a PowerPC 440 superscalar core, clocked at up to 667MHz, with dual 10/100 Ethernet and a PCI bus. Supports DDR266 memory. details.
AMCC 440SPe — Oct. 8, 2004 — The 440SPe is AMCC's first product based on a 400-series PowerPC core since it acquired the series from IBM in April, 2004. MontaVista and Wasabi will support Linux and BSD, respectively, on the device. The 440SPe will be the first SoC to offer three independent PCI Express and one PCI-X 2.0 interfaces. It targets RAID and SAN (storage area networking) controllers. details
Freescale MPC823e — Jun. 12, 2000 — 75 MHz PowerPC CPU along with a sophisticated communications signal processor, plus CRT/LCD/TV display controller, RTC, PCMCIA, four serial ports, USB, I2C, and SPI. details
Freescale MPC885 — Feb. 9, 2004 — The most powerful PowerQUICC I devices available, the MPC885 family feature an embedded 8xx core and separate RISC processor CPM to handle communications. Available in CPU frequencies of 66, 80, and 133 MHz, with on-chip security, dual Fast Ethernet (MII and RMII) ports, USB, and bus speeds scaling to 80 MHz. The MPC885 family includes the MPC870, MPC875, MPC880 and MPC885 processors. It targets controller applications, particularly in communications and networking products such as low-end routers, VPN routers with integrated security features, home networking equipment, cost-effective WLAN access points, and xDSL gateway boxes. details
Freescale MPC5200 — Jul. 22, 2003 — 400MHz PowerPC 603e core, uses less than 850 milliwatts, ROM/RAM/Flash controller, Ethernet, dual CAN (controller area network) ports, J1850, dual USB 1.1 host ports, ATA, I2S (Inter-IC sound), I2C (Inter-IC serial), SPI (serial peripheral interface), AC97 CODEC, 6 programmable serial controllers (PSCs), general puropose I/O / real-time clock / timers, PCI bus controller. Details here and here.
Freescale MPC7400 — June 18, 2004 — Motorola's G4 is a high-performance, low-power 32-bit implementation of the PowerPC RISC architecture with Motorola's AltiVec technology. Details here and here
Freescale MPC7410 — Mar. 30, 2004 — A 500MHz version of the G4+Altivec core with worst-case power dissipation under 12 watts. Details here, here and here
Freescale MPC7447 — Dec. 17, 2003 — A 1267MHz (max) version of the G4+Altivec with worst-case power dissipation of 25.6 watts. here
Freescale MPC7455/7 — Mar. 29, 2004 — The MPC7455 is a 1GHz G4+Altivec part dissipating 50 watts (worst case). The MPC7457 is a 1267MHz part dissipating 26.5 watts (worst case). Details here, here, here, and here
Freescale MPC8349E — May 7, 2004 — Based on e300 PowerPC core, supports DDR memory, Dual Gigabit Ethernet, Dual PCI, and hi-speed USB controllers. Clock speeds up to 667 MHz. Highest performing PowerQUICC II devices available, and the first PowerQUICC II chips built with system-on-chip architecture. Expected Q4, 2004. details
Freescale MPC8548E, MPC8547E, MPC8545E, and MPC8543E — Sep. 29, 2004 — Four PowerQUICC III chips built on 90nm process technology, targeting telecom and datacom applications such as storage, switches, image processing and control. Based on e500 PowerPC cores clocked up to 1.33GHz, along with various application-specific peripherals. details
Freescale MPC8641D — Sep. 29, 2004 — Built on 90nm SOI (silicon-on-insulator) technology, the yet-to-be-scheduled MPC8641D will feature dual e600 PowerPC cores, and target networking, telecom, military, storage, and pervasive computing applications. details
Freescale PowerQUICC II — Oct. 19, 2002 — Include a PowerPC instruction set based G2 core and a RISC-based Communications Processor Module (CPM) supporing 10/100 Mbps Ethernet, 155 Mbps ATM, and multi-channel HDLC. Supports 450 MHz on the core and up to 300 MHz on the CPM, at less than 2 Watts. Includes the MPC8270, for control plane applications not requiring ATM support; the MPC8275 with 3 Ethernet, 2 ATM, and 128 channel HDLC; and the MPC8280, supporting 256 HDLC channels. details
Freescale PowerQUICC III — Oct 21, 2003 — The PowerQUICC III processors use a system-on-chip (SoC) architecture built around a Book E PowerPC e500 core. They include 256KB on-chip L2 cache memory and an enhanced Communications Processor Module (CPM), and they support RapidIO interconnect technology, PCI/PCI-X, dual Gigabit Ethernet interfaces, and Double Data Rate SDRAM (DDR SDRAM). The PowerQUICC processor family includes the MPC8540 and MPC8560 processors with RapidIO technology and the new MPC8555 with integrated security. Details here, here, here, here, and here
IBM “BlueGene” SoC — ?Dec. 3, 2003 — IBM's next-generation BlueGene supercomputers will use up to 128,000 PowerPC processors embedded in half that many SoCs. The dual-core SoCs will integrate processing, message handling, three levels of on-chip cache, floating point units, routing hardware and more into a single ASIC (Application Specific Integrated Circuit) built on a 0.13-micron process, with an 11.1-mm die size. Each ASIC contains two PowerPC processors running at 700MHz, with one processor serving mainly for message handling. Each compute node also includes up to 2GB of off-chip RAM shared between processors, but more typically will have 256MB or 512MB. details
IBM PowerPC 405GP — Jun. 12, 2000 — 405GP and 405GPr processors support speeds of up to 400MHz and 333MHz respectively. They incorporate a 32-bit PCI V2.2 PCI interface, an SDRAM controller, 10/100 megabit Ethernet MAC, 2 serial ports, master and slave IIC controller, up to 24 general purpose I/Os, an interrupt controller including up to 13 external interrupts details
IBM PowerPC 750GX — Feb. 23, 2004 — An embedded version of the “G3” processor, targeting telecommunications, networking, storage, medical imaging, and industrial control applications. details
IBM PowerPC 970FX — Apr. 1, 2004 — The 90nm PowerPC 970FX draws half the power and will clock much higher than the 130nm PPC 970, also known as the G5 of Apple Macintosh fame. The 970FX is expected to support server blades with a higher processor density and lower cooling requirements. It targets next-generation networking, aerospace, and defense applications. Details here, here, here, and here
IBM STBx25xxx — Sep. 16, 2002 — An integrated set-top box solution based on a PowerPC core. Details here and here
IBM STB034xx — May 16, 2001 — A single-chip, high-performance controller for digital video broadcasting (DVB), digital recording, and demanding video delivery applications. Based on a PowerPC 405 core. Details here and here
Xilinx Virtex-II Pro, Virtex-II Pro X, and Spartan-3 — Mar. 30, 2004 — These PLDs (programmable logic devices) support one or more PowerPC soft cores, and are supported by development tools that can automatically generate Linux BSPs. details
Zarlink ZL10310/311 — Nov. 27, 2002 — These highly integrated PowerPC based SoCs integrate all major DVB-T (Digital Video Broadcasting-Terrestrial) processing functions aside from the RF radio tuner. They include a terrestrial demodulator and MPEG-2 video/audio, and an IBM PowerPC 405 CPU core. details
AMD Geode GX — May 24, 2004 — After acquiring National Semiconductor's Geode line (see listing below), AMD relaunched the chips with names describing their performance and power in relationship to VIA C3 chips. The pin-compatible variations include the “Geode GX [email protected],” “Geode [email protected],” and “Geode GX [email protected]” details
AMD Geode NX — May 24, 2004 — These new embedded processors are essentially identical to AMD's Mobile Athlon processors, including packaging, but with tweaks to process technology and transistor selections that result in lower power consumption at reduced clock rates. The Geode NX [email protected] processor operates at 1GHz and the Geode NX [email protected] operates at 1.4GHz. Both are “100 percent socket and chipset compatible” with AMD's “Socket A” Athlon XP processors, according to an AMD spokesperson. details
Intel Celeron ULV — Jun. 2, 2004 — Offering the lowest power requirement of Intel's Celeron M processors, the ULV (“ultra-low voltage”) can operate fanless at 600 MHz. details
Intel Pentium M 745 — Jun. 2, 2004 — A version of the “Dothan” Pentium M for the embedded market, the Pentium M 745 is a 90nm die-shrink of the previous Banias Pentium M, with 170 million transistors instead of 70 million. It includes 2MB of on-chip cache, for a claimed 17 percent speedup, along with heat dissipation 3.5 watts lower. It supports clock rates of up to 1.8GHz. details
National Geode 1200/2200/3200 — Sep. 20, 2000 — Acquired by AMD, see AMD Geode GX listing above. 266 MHz x86 CPU with full PC core logic including keyboard, mouse, RTC, and system controllers, plus PAL/NTSC (TV) display controller, video input, audio, dual serial, IEEE1284, digital I/O, three USB, dual IDE, and both PCI and ISA expansion buses. The Geode 2200 and 3200 are similar to the 1200, except the former substitutes an LCD/CRT display controller for the TV controller, while the latter substitutes an LCD-only display controller. details
SiS SiS550 LV and SiS552 LV — Mar. 6, 2003 — High-integration x86 SoCs targeting non-portable information appliances. Both include an MMX compatible 250MHz x86 CPU, northbridge, southbridge, DRAM controller, “Ultra-AGP” VGA, sound, software modem, and CIR controller. The SiS552 LV adds SmartCard and Sony Memory Stick controllers, DVD decoding accelerator, video in, and digital audio. details
STMicroelectronics STPC — Oct. 13, 2000 — the latest STPC family includes three devices that are based on a 133 MHz x86 CPU, plus PC-compatible core logic, an SDRAM memory controller, PCI and ISA expansion buses, and an EIDE disk interface. The Atlas includes PC keyboard, mouse, and serial/parallel ports, plus CRT/LCD display controller, PCMCIA/Cardbus, and USB host hub. The Consumer II substitutes TV (NTSC/PAL) display output, and leaves off several PC peripheral interfaces. The Elite provides a reduced subset of functions for lower cost and power consumption. details
Transmeta Crusoe SE — Apr. 7, 2003 — The “special embedded” version of Crusoe is available in 667, 800, and 933MHz, and standard and low-power versions. They support LongRun power and thermal management, enabling fanless designs. Code Morphing Software (CMS) maximizes real-time performance while maintaining x86 compatibility. Includes integrated northbridge for 2-chip solution. Extended availability program supports long-term embedded product life cycles. Details here and here
ZF Micro Devices ZFx86 (formerly called MachZ) — Jun. 12, 2000 — 133 MHz x86 CPU with full PC core logic including keyboard, mouse, RTC, and system controllers, plus interfaces to floppy, IDE, dual USB, dual serial, IRdA, parallel, Access Bus, I2C, and both PCI and ISA expansion buses. Unique built-in “fail-safe” boot ROM function. details
VIA Eden — Feb. 12, 2004 — An embedded version of VIA's C3 consumer x86 chip, the Eden family comprises passively cooled x86 processors using 7W (worst case) at clock speeds up to 1GHz. The VIA ESP10000 and ESP8000 are pin-compatible with earlier VIA processors and with Intel X86 CPUs. They feature hardware-based AES encryption and dual Random Number Generators (RNGs), and are available in a nano-BGA package about the size of a penny. Details here and here
Analog Devices Blackfin BF53x — Feb. 13, 2004 — Metrowerks has ported uClinux to ADI's Blackfin BF535 DSP, with a port to the BF533 in progress. ADI's Blackfin is based on the Micro Signal Architecture co-developed by Analog Devices and Intel, which incorporates both Digital Signal Processing (DSP) and microcontroller functionality in a single core. details
Altera Nios II — May 19, 2004 — Altera has announced a new family of 32-bit soft RISC processor cores it hopes will greatly expand the market appeal for its field-programmable gate arrays (FPGAs). The new Nios II cores support uClinux, and target software-intensive custom processor designs where application-specific integrated circuits (ASICs) would be too costly and time-consuming to produce. The cores are available with a development kit that includes an Eclipse-based integrated development environment (IDE) for software development, as well as a development board. details
Axis ETRAX 100LX — Jun. 12, 2000 — includes a 100 MIPS 32-bit proprietary RISC processor with MMU, plus on-chip controllers for 10/100 megabit Ethernet, four high speed serial ports, two USB ports for both host and device, IDE, SCSI, and two IEEE-1284 “fast” parallel ports. Internal ROM supports boot-from-LAN. details
Equator BSP-15 — Apr. 21, 2004 — The “Broadband Signal Processor” uses a VLIW (very long instruction word) architecture with an instruction set designed for video processing. The C/C++ programmable chip delivers a claimed 40 billion operations per second at 400Mhz and is available with a reference design for multi-format video-over-IP devices. details
Freescale Coldfire — May 17, 2004 — Freescale's older 32-bit microcontrollers and processors based on M68K cores support uClinux. The most recent Coldfire chips, the MCF547x and MCF548x, are based on a v4e core that includes an on-chip MMU, enabling them to run Linux. details
Freescale DragonBall VZ/Super VZ — Apr. 25, 2002 — The Dragonball VZ integrates a 33MHz 68K core, LCD display controller, on-board ethernet, and control for up to 22 I/O devices. The Super VZ includes a 66MHz 68K core. Details here, here, here, and here
Hyperstone E1-32XS — Oct. 15, 2003 — A single core SoC integrating RISC and DSP instruction sets with on-chip MCU (microcontroller unit) functions. Runs “hyLinux,” a uClinux port done in conjunction with Global Digital Technologies. details
Infineon Technologies TriCore TC1130 MCU — February 18, 2004 — A 32-bit microcontroller unit (MCU) integrating CISC, RISC, and DSP instructions. Includes MMU (memory management unit) and FPU (floating point unit) for full Linux support. Delivers 200MIPS (millions of instructions per second) at 150MHz, and benchmarks well. Has 144 Kbytes of on-chip RAM memory and a 64-bit high-performance LMB (local memory bus), and supports extreme temperatures. details
Metagence META — Aug. 26, 2003 — A multi-threaded RISC processor with integrated DSP that can run Linux on one thread and real-time DSP functions on others. Features programmable and dynamic processor resource allocation. Thought to be the first port of Linux to a multithreaded processor architecture. details
Renesas SH-4, SH-5, SH-6, SH-7 — — Renesas cores include the 32-bit SH-4 with FPU, and the 64-bit SH-6, which adds SIMD (single instruction multiple data) capabilities. Future generations will include the 64-bit superscalar SH-6 and the multithreading SH-7. The cores appear in a variety of SoCs from Renesas. Details here, here and here
Renesas SH7705 — May 14, 2003 — An ultra-low-power microprocessor that consumers a claimed 1mA per 1MHz. Based on SH-3 SuperH RISC CPU core, with “comprehensive” peripherals, including USB, serial, MMU, DMAC, memory interface, and IrDA. details
Renesas SH7727 — June 4, 2001 — A USB-enabled SoC targeting handheld computers, cameras, and networking devices. Based on a 32-bit, 160MHz SH3-DSP CPU core. Integrates a USB Host, USB function, color LCD controller, and many other peripherals. Details here and here
Renesas SH7751R — Mar. 30, 2004 — The SH7751R is based on a 32-bit SH-4 RISC core running at 240MHz. It targets multimedia and telematics applications, and integrates an FPU, SIMD (Single Instruction Multiple Data) acceleration for 3D and DSP, 16-bit fixed instruction length for low memory footprint, and a PCI controller. Details here and here
Renesas SH7760 — Mar. 30, 2004 — The 'Camelot' is based on a 32-bit superscalar RISC SH-4 core running at 200MHz, and targets telematics products. An on-die FPU obviates the need for a separate DSP in many systems. Available with a HD64404 multimedia companion chip. Details here, here and here
Renesas SH7780 — Aug. 14, 2004 — A 400MHz part based on the SH-4A core (upwardly compatible with SH-4). Includes a fullspeed single-/double-precision FPU, hardware sine/cosine engine, 32KB instruction and 32KB data caches, 16KB onchip RAM, and three buses (RAM, PCI, localbus). Targets car navigation systems, game machines, and digital home electronics products. details
Renesas SH-Mobile3 — May 24, 2004 — An integrated SoC for mobile phones, based on a SH4AL-DSP CPU core, the instruction set of which is upwardly compatible with the cores used in previous SH-Mobile chips. The core delivers a claimed 389 MIPS at 216MHz (1.8 MIPS/MHz), a 2.3-fold increase over the SH3-DSP core, which turns in only 173 MIPS at its max 133MHz clocking (1.3 MIPS/MHz). The SH-Mobile3 also integrates a 3MP camera interface, TV out, 6-channel DMAC, and various accelerators. details
Renesas SH-Mobile-V — Nov. 25, 2003 — Renesas's next-generation SoC for mobile phones. details
Renesas ST40 — Oct. 16, 2001 — A synthesizable SuperH RISC core co-developed by ST and Hitachi. Provides a 166MHz, 300MIPS 32-bit CPU based on a two-way superscalar architecture, a 64-bit floating-point co-processor, and on-chip instruction and data caches. details
STMicroelectronics ST40GX1 — Oct. 16, 2001 — An SoC for STBs that integrates the 166MHz, 300MIPS 32-bit SuperH-based ST40 core with a graphics processor. details
Tensilica Xtensa V — Jun. 7, 2004 — A configurable, extensible and synthesizable 32-bit RISC processor core based on Tensilica's patented Xtensa instruction set and architecture, and supported by an Eclipsed-based IDE, the Xtensa V targets digital consumer, networking, office automation and wireless embedded SOC applications. details
Tensilica Xtensa LX — June 7, 2004 — The Tensilica Xtensa LX is a configurable, extensible, and synthesizable processor core claimed to offer I/O bandwidth, compute parallelism, and low-power optimization equivalent to hand-optimized, RTL-designed non-programmable hardware blocks. It is supported by an Eclipsed-based IDE, and targets traditional SOC embedded processor control tasks, as well as compute-intensive datapath hardware tasks. details.
Texas Instruments TMS320DM64x DSP — Nov. 11, 2003 — Startup Softier made news by implementing a real-time version of Linux on this chip, probably the first full-featured (includes Ethernet MAC) DSP core ever to run Linux. details
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