Tri-M Engineering has unveiled a family of PC/104 form-factor modules based on Altera's Cyclone field programmable gate arrays (FPGA). The modules are available with several PC/104 connection options, and are expected to run embedded Linux on a Nios “soft” core processor.

The family includes modules based on Cyclone FPGAs with 4K, 12K, or 20K logic elements. The FPGAs can be field-programmed with Altera's Nios embedded RISC “soft” processor core, as well as with a wide range of other intellectual property (IP) functions, according to Tri-M.

Developers can use Altera's free Quartus-II basic FPGA design software to define custom functions to be implemented by the modules' Cyclone FPGA. Additionally, a Linux port for the Nios is available that is expected to run on the new modules, according to Tri-M CEO Doug Stead.

“We are 99.99 percent certain that the Nios soft-processor will run with the Linux build that supports the Cyclone Nios,” said Stead. “Our memory expansion card is in the works and we will be testing out booting Linux and running the kernel in the near future. Our board designs were reviewed by an Altera FAE who supports customers using this product. Hence, we anticipate no major problems in this area.”

Tri-M is currently offering two versions of the FPGA module — one with an ISA bus, in PC/104 format, and the other with a PCI bus, in PCI-104 format.

Front view of PC/104 version of the FPGA module
(Click above image for a larger view)

A photo of the “PCI-104” FPGA module version, with a 120-pin PCI bus instead of the 104-pin ISA bus, is here.

For I/O expansion, the modules have sockets for adding up to four daughter cards, with each daughter card location capable of interfacing up to 28 I/O signals. Daughter cards can encompass one or more daughter card locations, for greater I/O (see photo below for an example of a double-wide daughter card). Tri-M plans to offer several types of I/O expansion card, including an Opto-22 interface and various sizes of prototyping boards.

Annotated photos of the two versions of the module, identifying connectors and components of interest, are here:

• Annotated photo of PC/104 FPGA module
• Annotated photo of PCI-104 FPGA module

According to Tri-M, the PC/104 module provides an interface to the full PC/104 bus signals including memory and I/O signals, while the PCI-104 module version provides a full PCI 2.3 interface.

Tri-M's ESC demo: FPGA module populated with LED daughter cards
(Click above image for a larger view)

According to Ed Foster, Tri-M's vice president of engineering and manufacturing, the FPGA104 and the FGPA-PCI104 were designed as “slave-only” devices and can operate as smart peripheral modules — when suitable IP is added — or in a standalone manner.

“The FPGA104 however, has access to almost all the PC/104 bus signals,” says Foster. “Only the two clock signals on the PC/104 bus aren't supported. Therefore, it would be possible for the FPGA104 to control or monitor [PC/104] I/O expansion cards. This could provide some “low cost” I/O expansion such as the Tri-M IR104 module (20 optoisolated inputs and 20 relay outputs) and other general purpose cards. It might also allow installation of a M-Systems DiskOnChip using one of the Tri-M carrier cards such as the TMD104 or MD104 for mass data storage. The level of PC/104 bus expansion capability has not been investigated or tested as yet. We may add the two missing clock signals to the FPGA104 in the next revision as well.” On the other hand, “the FPGA-PCI104 does not have direct access to the PCI signals and therefore cannot do the same,” Foster notes.

Regarding the memory expansion necessary to run Linux from a soft-core Nios processor IP installed in the Cyclone FPGAA, Foster explains, “We are planning a memory module daughtercard for the FPGA products. This module (FPGA-MEM) module would have a 16-bit SDRAM interface and could support both SDRAM and Flash (Flash with SDRAM interface signals) on it. The FPGA-MEM would require two daughtercard mounting locations.”

The modules' Cyclone FPGA can be configured in three ways: via an onboard EEPROM, the ISA or PCI bus (depending on module version), or the JTAG port. Similarly, the onboard configuration EEPROM can be programmed, independently of the FPGA, via the system bus (ISA or PCI) or via the JTAG port.

Each of the modules also includes:

• An onboard real-time counter/clock with SuperCap backup
• A unique read-only 64-bit serial number ROM
• Connectors and physical layer circuits for 10/100 Ethernet and optionally a 10/100/1000 GIGJACK port
• An I2C/SMBus
• A 50 MHz oscillator, along with an SMB connector for an external reference frequency source

The FPGA modules can be powered either from the system bus (ISA or PCI) or from an external 6-18V DC supply.

 
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