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Chinese SoCs run Linux

Jun 6, 2008 — by LinuxDevices Staff — from the LinuxDevices Archive — 51 views

Beijing-based Ingenic Seminconductor is shipping three MIPS-based SoCs (system on chips) that support Linux. The Jz4720, Jz4730, and Jz4740 target devices ranging from basic PMPs (personal media players) to smartphones, with “high performance and low power consumption,” the company says.

The Jz47xx SoCs appear to have started sampling last Fall. However, they have become a topic of interest in the blogosphere more recently, since they started appearing in complete devices. Two recently released Linux-based laptops, the Bestlink Alpha 400 and the 3K RazorBook 400, both use the Ingenic processors, and sell for just $250 and $300, respectively.

The Jz47xx SoCs are built on a 0.18-micron process — evidence that China remains a few generations behind in semiconductor fabrication technology. Like RMI's Alchemy SoCs, the Jz parts are based on the MIPSII architecture, dubbed “Xburst” by Ingenic. The cores have 16KB data and instruction caches, and the SoCs integrate on-chip LCD and audio controllers, together with a wide variety of interfaces.

A block diagram of Ingenic's Jz4720
(Click to enlarge)

Of the three SoCs, the 240MHz Jz4720 (block diagram above) and 360MHz Jz4740 (block diagram below) are the most architecturally similar. To the MIPSII core, they both add Ingenic's multimedia accelerator, which implements a SIMD (single instruction, multiple data) instruction set. The accelerator is said to provide MPEG-4 decoding at 25 frames per second, with CIF (352 x 288 pixels) resolution on the Jz4720 and VGA resolution on the JZ4740.

A block diagram of Ingenic's Jz4720
(Click to enlarge)

Features and specifications listed by Ingenic for the Jz4720 and Jz4740 include:
  • Static memory interface, with SRAM, ROM, burst ROM, and NOR flash
  • NAND flash interface, with support for MLC and SLC NAND, as well as booting up from NAND flash devices
  • Synchronous DRAM interface, supporting two-bank or four-bank SDRAM, auto-refresh and self-refresh functions, power-down, and page mode
  • DMA controller, with six channels
  • On-chip oscillator circuit for an 32768Hz clock and an 12MHz clock
  • GPIO (90 ports on Jz4720, 124 on Jz4740)
  • Interrupt controller, letting unmasked interrupts can wake up the chip in sleep or standby mode
  • Timer and counter unit with PWM output
  • Watchdog timer
  • RTC (real time clock)
  • LCD controller, with support for displays up to 800 x 600 pixels and up to 16M colors
  • Embedded audio codec, with support for microphone input and headphone output
  • MMC/SD/SDIO controller
  • I2C bus interface
  • Synchronous serial interface
  • Two UARTS
  • USB 1.1 host interface
  • USB 2.0 device interface

  • 4MP camera interface module (Jz4740 only)

A block diagram of Ingenic's Jz4730
(Click to enlarge)

Meanwhile, Ingenic's 336MHz Jz4730 (block diagram, above) is something of a hybrid. Like the Jz4740, it includes a 4MP camera interface. However, it does not include the multimedia accelerator and SIMD instruction set found on the other two SoCs. It also omits USB 2.0 but, in other respects, is the more “connected” device.

For example, features found on the Jz4730, but not on its sister chips, include:

  • Smart card controller
  • 802.3-compliant Ethernet interface
  • PC card interface, supporting dual PCMCIA or CompactFlash slots
  • Eight DMA channels instead of six

The Ingenic Jz47xx processors are available now, as is a Linux board support package. A changelog on Ingenic's Linux page suggests the company maintains a kernel for its SoCs, with drivers that include YAFFS2, UBI & UBIFS, power management, SLC/MLC NAND, MMC/SD, LCD framebuffer, ALSA/OSS audio, UDC, USB host, Camera, RTC, WatchDog, udev, hotplug etc. The page also hosts ports of several open source applications, including the versatile mplayer media player. Ingenic also supports Windows CE 5.0 with a BSP.

More information on the Ingenic Xburst procesors may be available here.

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