Freescale Semiconductor has announced a pin- and software-compatible successor to its Linux-compatible PowerQUICC line of network processors. Based on one to eight e500 cores clocked from 400MHz to 1.5GHz, the power-efficient “QorIQ” processors will be fabricated with 45nm process technology, and offer built-in support for virtualization.

The Linux-compatible QorIQ processors have already received support from the two leading carrier-grade Linux distributions from MontaVista and Wind River, at least for the high-end P4 family (see below). The QorIQ SoCs range from the single-core P1010, clocked at 400MHz and consuming only four Watts, to the eight-core P4 clocked at 1.5Ghz, and requiring 30 Watts, says Freescale. While high-end 90nm-fabricated PowerQUICCs such as the MPC8572 are also clocked up to 1.5GHz, their power consumption is said to be higher. The power efficiency of the QorIQ processors can be tied in large part to the 45nm fabrication, the first time Freescale has used the technology on its communications processors.

At the heart of all the the QorIQ processors is the same tried-and-true e500 Power Architecture core used by PowerQUICC processors, with frequencies ranging from 400MHz to 1.5GHz. Each e500 is said to offer 36-bit physical addressing, double-precision floating-point support, a 32KB L1 instruction cache, and a 32KB L1 data cache. Freescale has added additional performance-improving features to the P4, including private backside cache per core, tri-level cache hierarchy, datapath acceleration architecture (DPAA), and a CoreNet coherency fabric that provides a on-chip, high-speed interconnect between e500 cores, says the company (see P4 section below).

QorIQ P1 block diagram
(Click to enlarge)
Two additional QorIQ families will be announced later in the year: the Q3 and Q5. The Q3 is a multicore family that is similar to the P4. It shares the P4's support for CoreNet and improved cache, but offers fewer cores. The P5, meanwhile is billed as being “Freescale's highest-performing embedded processor within the 30W power envelope.”

The lower-end P1 and P2 families are pin- and software-compatible with each other, says the company, and are software compatible with PowerQUICC processors. The P1 family is said to provide a migration path for PowerQUICC II Pro customers, while the P2 does the same for PowerQUICC III-based applications. The dual-core P1020 and P2020 models support symmetric and asymmetric multi-processing, which is said to enable “performance scaling through either thread-level or application-level parallelism.”

The P1: up to 800MHz on four Watts

The three QorIQ P1 models — the P1020, P1011 and P1010 — target multiservice gateways, Ethernet switch controllers, wireless LAN access points, networking and telecom line cards, and other control processor applications with tight thermal constraints. The 667MHz P1010 and 800MHz P1011 each offer a single e500 while the 800MHz P1020 offers dual cores. The lower-powered P1010 differs from the other two models in that it provides only two gigabit Ethernet ports instead of three, and is limited to two SERDES (serializer-deserializer) ports instead of four. Specific features for the three models include:

• Cache — 256KB L2 cache with ECC (P1010 cache N/A)
• Networking — 3 x 10/100/1000Mbps Ethernet ports (P1010 limited to 2 x GB ports), with TCP/IP acceleration, IEEE 1588v2 support, lossless flow control, support for R/G/MII, R/TBI, SGMII, and FIFO interfaces
• SERDES — 4 x 3.125GHz ports multiplexed across controllers (2 x ports for P1010)
• PCI Express — 2 x interfaces
• SGMII — 2 x interfaces
• USB — 2 x high-speed USB 2.0 (Host and device) controllers with enhanced host controller interface (EHCI) and ULPI interface to PHY
• Other I/O — Enhanced secure digital host controller (SD/MMC); Serial peripheral interface
  
• Security — security engine with XOR acceleration, supports SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, and Kasumi
  
• Controllers:
  • DDR2/DDR3 SDRAM memory controller with ECC support
    
  • Programmable interrupt controller (PIC) compliant with Open-PIC standard
    
  • 2 x four-channel DMA controllers
    
  • 2 x I2C controllers, DUART, timers
    
  • Enhanced local bus controller (eLBC)
    
  • 16 x general-purpose I/O signals

• Package: 689-pin wirebond power-BGA (TEPBGA2)

QorIQ P2 block diagram
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The P2: Dual cores at 1.2GHz

The P2 QorIQ models — the single-core P2010 and dual-core P2020 — are both clocked at 1.2GHz. They handle all the applications supported by the P1, plus base station channel cards, carrier-class VoIP and wireless media gateways, unified threat managers, and network printing and storage applications, says Freescale.

Compared to the P1, the P2 offers a larger 64KB memory controller that supports both DDR2 and DDR3 memory. It also offers larger L2 caches (512KB), which can be partitioned between cores and are configurable as SRAM and stashing memory. The P2 is also said to support error correction codes, provide two Serial Rapid IO (SRIO) interfaces, and offer three PCI-E interfaces instead of two. Otherwise the specs are similar to the P1 (see above).

QorIQ P4 block diagram
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The QorIQ P4: Eight cores and 1.5GHz on 30 Watts

The eight-core P4 supports a wide variety of networking and telecom applications, including switches, enterprise and service provider routers, radio network controllers (RNCs), and high-end embedded computing systems, says Freescale. As with the upcoming P3 family, the P4 is said to enable system developers to “strictly manage device frequency and voltage.” The P4 also supports code performance monitors, and extensive debug visibility and access.

Via a collaboration with Virtutech, the P4 supports hypervisor technology, with each of the eight e500 cores supporting three levels of instructions: User, Supervisor, and Hypervisor. Virtutech provides a hybrid simulation environment that is said to offer a “controlled, deterministic, and fully reversible” environment for the development, debugging and benchmarking of software in embedded multicore environments. Virtutech has previously provided virtualized simluation models for PowerQUICC processors.

P4 Hypervisor architecture
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In addition to the 32-bit L2 caches used by the P1 and P2 familes, the P4 has a “private” 128KB L2 cache. The P4 also comes with a 2MB shared L3 platform cache for the CoreNet fabric interconnect. CoreNet is said to support both coherent and non-coherent transactions with prioritization and bandwidth allocation, and provides a claimed 800Gbps coherent read bandwidth. According to Freescale, CoreNet also supports packet-level queue management and quality of service scheduling.

The P4's DPAA datapath acceleration speeds up packet parsing, classification, and distribution, while offering queue management for scheduling, packet sequencing, and congestion management, says the company. The technology is said to provide buffer allocation and de-allocation, as well as SEC 4.0 encryption and PME 2.0 RegEx pattern matching,

Additional P4 specs are said to include:

• Memory controllers — 2 x 64-bit DDR2/DDR3 SDRAM memory controllers with ECC and interleaving
• Networking — 2 x 10GBps Ethernet (XAUI); 8 x 1Gbps Ethernet (SGMII)
• PCI Express — 3 x PCI Express v2.0 interfaces at up to 5GHz
• SRIO — 2 x Serial RapidIO 1.2 interfaces at up to 3.125GHz
• USB — 2 x USB controllers with ULPI interface to external PHY
• Other peripheral controllers — SD/MMC, SPI, 4 x I2C, 2 x dual UARTs (DUART), eLBC
• Other features — multicore programmable interrupt controller (PIC); 2 x four-channel DMA engines

Wind River and MontaVista support the P4

Vendors of major Linux distros have already taken an interest in the high-end QorIQ P4 platform. MontaVista has announced a Linux Support Package (LSP) for application development on the P4080 processor. MontaVista Linux Professional Edition 5.0 and MontaVista DevRocket will be available for the P4080 communications starting in Q3 2008 via MontaVista TestDrive, says the company. Wind River, meanwhile, will support the P4080 with Wind River Linux, as well as its Eclipse-based Workbench development suite, running on Virtutech's Simics simulator. Wind River did not provide a timetable for its integration.

Stated Jeff Timbs, director of strategic marketing for Freescale's Networking Systems Division. “Our P1 and P2 platforms enable customers to transition from single- to dual-core with significant performance gains while keeping power extremely low.”

Stated Lynelle McKay, SVP/GM for Freescale's Networking and Multimedia Group, “Our new QorIQ P4080 processor addresses the need to dramatically scale performance without introducing complexity for developers.”

Availability

The first members of the QorIQ P2 family are expected to sample to lead customers in Q4 of this year, with beta samples scheduled for Q1 2009, says Freescale The first members of the QorIQ P1 family should begin sampling in 2009. The QorIQ P4080 processor is scheduled to begin sampling in mid-2009. More information on the QorIQ communications platform can be found here

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