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Power-stingy dual-core PowerPC chip samples

Feb 5, 2007 — by LinuxDevices Staff — from the LinuxDevices Archive — 36 views

Fabless semiconductor startup P.A. Semi is sampling a power-efficient, dual-core, 64-bit PowerPC processor targeting networking, storage, mil/aero, and wireless infrastructure. The Linux-friendly, 2GHz PWRficient PA6t-1682M consumes 3-4 times less power than other equally appointed 65nm processors — about 25 Watts,… worst case, according to the company.

(Click for larger view of the PA6T-1682M)

P.A. says it designed the PWRficient chip to offer “unprecedented” performance per Watt. Typical power consumption ranges from 5-13 Watts, while “worst-case” consumption with both 2GHz cores running flat out, and all on-chip peripherals active, is said to be 25 Watts. P.A. claims this figure to be three or four times lower than power usage specs for other 65nm processors with equivalent peripherals.

The PWRficient PA6T-1682M integrates a pair of 64-bit cores based on the Power Architecture, which P.A. licenses from IBM. Each core has its own dual-integer, floating-point, and VMX vector processing units, and the chip has 2MB of L2 cache.


PWRficient PA64-1682M block diagram

On-chip functions and peripheral interfaces include:

  • Two DDR-2 memory controllers
  • Hardware assist engines for TCP/IP acceleration, security, CRC checksum, and XOR computation
  • Flexible I/O subsystem
    • Eight PCI Express controllers
    • Two 10-Gigabit Ethernet controllers
    • Four Gigabit Ethernet controllers that share 24 configurable SERDES lanes

According to P.A., the PA6T-1682M was alpha-tested by 10 development partners. Additionally, the chip has already attracted 100 initial customers, the company claims, citing Curtiss-Wright, Extreme Engineering Solutions (X-ES), Mercury Computer Systems, Performance Technologies, Splitted-Desktop Systems, and Themis Computer.

P.A. is led by Dan Dobberpuhl (pictured at right). A former VP of broadband processors at Broadcom, and a 20-year veteran of DEC's Alpha chip design team, Doberpuhl also led development of StrongARM and SiByte processors, P.A. says.

According to Dobberpuhl, “The industry recently awoke to the need to move to energy-efficient processors. Successfully delivering on aggressive power and performance metrics [and] building out our support and sales infrastructure has helped to generate strong customer interest.”

Stanford professor John Wakerly stated, “In recent years, the sophistication and types of services applied to packets and streams in the Internet, and especially intranets, have redoubled at the same time that overall traffic is growing rapidly. The result is an astonishing increase in the number of general-purpose-CPU instructions that must be executed within the network, creating a crucial need for high-performance, I/O-rich multicore microprocessors that can pack large amounts of computing and packet-handling power within a small power envelope. The need for such 'platform processors' extends well beyond traditional routing control planes and data planes to the growing array of embedded network services, such as security, authentication, content customization, voice over IP, unified messaging, and converged video solutions.”

P.A. Semi announced its PWRficient chip in October of 2005, after three years of “stealth” operation. The PA6T-1682M appears to be the company's first product. Additional details about the company's PWRficient roadmap can be found in our previous coverage.

Availability


PAEV eval board
(Click to enlarge)

The PWRficient PA64-1682M is sampling now as part of an evaluation kit (PAEV-1682M-001) that includes an ATX-form-factor board (pictured at right). The board is supported under Linux, QNX Neutrino, and VxWorks, with other standard OS support to be announced soon, P.A. says. Wind River's Workbench hardware and software tools support the chip under both Linux and VxWorks, according to P.A.

The PWRficient evaluation board specs include:

  • 2 x 1GB Ethernet ports
  • 1-, 4-, and 16-lane PCIe slots
  • 4 x DDR2 DIMM slots
  • IDE, 2 x UARTs, USB 2.0 OTG, JTAG

Additionally, an optional Network Adapter Pack that adds a pair of 10GB Ethernet ports is available.

General availability of the PA6T-1682M chip is expected in Q4, 2007. Pricing was not disclosed.


 
This article was originally published on LinuxDevices.com and has been donated to the open source community by QuinStreet Inc. Please visit LinuxToday.com for up-to-date news and articles about Linux and open source.



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