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PowerQUICC gains new protocol microcode

Aug 4, 2006 — by LinuxDevices Staff — from the LinuxDevices Archive — 3 views

DoGav Systems will soon ship two new microcode products for Freescale PowerQUICC processors. One implements “System Fabric Plane” (SFP.1) protocol, described as a “multiplexed voice-over-packet protocol” that supports higher densities than VoIP. The other implements “Generic Framing Protocol” (GFP), said to offer lower latency and greater bandwidth determinism than HDLC (high-level data link control).

Each microcode product is delivered as an object file, along with a C-language function that “enables and executes” the microcode on the CPM (communications processor module) or QUICC engines contained in supported Freescale PowerQUICC processors. The C function can be integrated with user applications, the company says.

DoGav's microcode for the SFP.1 protocol (PDF file), also known as “Pseudo-Wire,” targets media processing applications such as voice conferencing and voice mail that require higher densities or lower latencies than VoIP (voice-over-IP) can provide. SFP.1 is especially suitable for “carrying many TDM voice/data calls over the packet bus itself,” DoGav says, for example as part of a migration strategy toward converged voice and data networks.

The microcode for the GFP (aka ITU-T G.7041) protocol provides functions for a “generic interface to underlying frame representation systems (FRSs),” DoGav says. GFP is said to offer lower latency than HDLC, while allowing “deterministic” bandwidth, because variable length client signals such as IP/PPP, Ethernet media access (MAC), or fiber channel can be be mapped over transport networks such as SDH/SONET.

Jon Devlin, director of systems engineering for Freescale's digital systems division, stated, “These microcode implementations [provide] a cost-effective, quickly deployable alternative to adding hardware.”

Availability

DoGav's SFP.1 microcode is expected to ship in August, for Freescale MPC8280 PowerQUICC II, MPC83xx PowerQUICC II Pro, and MPC8555E/8560 PowerQUICC III processors.

The GFP microcode is due in August for PowerQUICC II and PowerQUICC III, with a PowerQUICC II version expected in September.


 
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