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Sun GPLs Sparc design, multi-threading tech

Mar 21, 2006 — by LinuxDevices Staff — from the LinuxDevices Archive — 1 views

Sun released a 64-bit multicore, multi-threaded processor design under the GNU GPL today, at the Multicore Expo in Santa Clara. The OpenSparc T1 design supports eight cores, with four threads per core, and is based on Sun's UltraSparc T1 processor, which was touted as an energy-saving breakthrough when it shipped last November.

The UltraSparc T1 draws about 80 Watts, roughly half that drawn by comparable Intel Xeon or IBM Power processors, Sun said when it launched the chip last fall, along with Solaris 10 support. The T1's threading model has eight 6-stage pipelines that combine to support up to 32 light-weight processes (LWPs), each of which can have instructions executing simultaneously, Sun says.

Sun previously released the T1's hypervisor APIs, in hopes that Linux, BSD, and other operating systems would be ported to the chip. Now, Sun is distributing the T1's ISA (instruction set architecture), Verilog sources, and verification and simulation models, as well as documentation and simulation products related to porting application software to Solaris 10.

Sun clearly hopes that freeing its T1 software design will entice more embedded developers to use Solaris, its proprietary Unix OS. David Yen, EVP of Sun's scalable systems group, stated, “Sun is using open standards and the creation of a rich CMT community to foster innovation and maintain our multi-year lead over competitors in delivering multi-threaded systems to customers.”

Sun CEO Jonathan Schwartz views the GPLing of the OpenSparc T1 design as an opportunity to expand the market for Sparc beyond Solaris. “Having Linux or BSD ports for the UltraSPARC T1 processor will greatly expand the SPARC market, giving customers more opportunities to reap the benefits of our CoolThreads technology. The OpenSPARC effort is fostering a community for SPARC-based, 32 thread innovation that will play a crucial role in redefining industry standards in the data center,” Schwartz said at the Open Source Business Conference in San Francisco last month.

The OpenSparc T1 release is part of Sun's larger OpenSparc program, which recently partnered with a half-dozen technical universities on a “RAMP” project aimed at building a 1,000-core scalable research system based on a 64-bit RISC processor port. UC Berkeley Professor David Patterson stated, “[The OpenSparc T1 processor] can potentially be mapped into an FPGA implementation.”

Organizations voicing support for Sun's OpenSparc T1 release include Aurora VLSI, Aldec, Synopsys, World 45 Ltd., SimplyRISC, Time-to-Market, and University of California, Santa Cruz. Aldec will offer a 90-day free trial download of its Riviera Verilog simulator in support of the T1 release.

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