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Embedded Nehalem CPUs have integrated I/O

Sep 14, 2009 — by LinuxDevices Staff — from the LinuxDevices Archive — 2 views

In advance of its annual developer forum next week, Intel has announced “Nehalem”-based processors targeting embedded and storage applications. Code-named “Jasper Forest,” the new Xeon CPUs range from a single-core processor with a 23-Watt TDP, to a quad-core processor with a 85-Watt TDP, and include an integrated I/O hub, the chipmaker says.

Heralded via a news release issued on Sunday, the Jasper Forest CPUs are the latest manifestation of Intel's "Nehalem" microarchitecture, which was extended to mainstream desktop PCs and entry-level servers just last week with the release of the Core i5, i7, and Xeon 3400 processors. The new embedded CPUs will come with seven-year lifecycle support, and will be aimed at communications, storage, wireless infrastructure, routers, military, and security applications, the company says.

While Intel is working on transitioning its CPUs to a 32nm process — see later in this story for details — the Jasper Forest Xeons are still 45nm parts, according to the company. Nonetheless they represent a breakthrough, says Intel, because they include an I/O hub integrated via PCI Express. This integration will save valuable board real estate, and lowers system power consumption by 27 Watts, compared to the previous Xeon 5500 CPUs, the chipmaker says.

The die for Intel's Jasper Forest CPUs
Source: Intel (Click to enlarge)

According to Intel, Jasper Forest CPUs will range from a single-core, 23-Watt processor, to a quad-core, 85-Watt processor, and all will use the same motherboard socket. A midrange, dual-core version will be clocked at 2.13GHz and have a 60-Watt TDP, the company adds.

Jasper Forest will come in multiple versions

In its release, Intel touted the following additional technical features of the new Jasper Forest Xeons:

  • Non-transparent bridging functionality allows multiple systems to seamlessly connect over a PCIe link, removing the need for an external PCIe switch
  • Integrated RAID "acceleration"
  • Integrated asynchronous DRAM self-refresh memory, helping to protect critical data in the event of a power failure

While Intel's claim of an "integrated I/O hub" for Jasper Forest has been widely reported, this apparently still does not mean that these CPUs will constitute a single-chip solution. The chipmaker has not released a block diagram pertaining to the Jasper Forest Xeons, but its release referenced the "Intel 3420" chipset. As we reported last week in the context of the Xeon 3400 announcements, the 3420 Platform Controller Hub is a 27 x 27mm chip used to add eight PCI Express x1 ports (configurable as x2 and x4), six SATA 3Gb/sec. ports, 12 USB 2.0 ports, and "Matrix Storage Technology," according to Intel.

A block diagram of Intel's Xeon 3400 and 3400 series chipset
(a lower-end version of the 3420 mentioned above)

(Click to enlarge)

Intel goes 32nm

According to an article in our sister publication, Intel will use its annual Intel Developer Forum (IDF) — scheduled for Sept. 22 to Sept. 24 in San Francisco — to provide updates on its move to a 32nm process for producing its CPUs. The chipmaker is expected to report that 32nm "Westmere" chips are on schedule for revenue production starting in the fourth quarter, according to writer Jeffrey Burt.

Burt quotes Steve Smith, Vp and GM of Intel's digital enterprise group, as saying that the new manufacturing process will give Westmere chips better performance per Watt than their 45nm counterparts. Offered in models for both CPU-optimized, higher-performance systems and SoC (system-on-a-chip) devices such as MIDs (mobile Internet devices), the CPUs will offer low power and low electricity leakage, he is said to have added.

According to an Intel blog posting, Westmere represents an advance to a second-generation high-k+ metal gate transistor formula, giving Intel a three-year advantage in addressing leaky and energy in-efficient transistors. Intel says it has already shipped more than 200 million 45nm CPUs using high-k+ metal gate transistors.

Sanjay Natarajan, Intel director of logic technology development, introduces the company's Westmere chips

Source: Intel
(click to play)


According to Intel, its Jasper Forest Xeons for embedded applications will be available in early 2010. Prospective pricing was not revealed.

For more information on Intel's Westmere chips and the upcoming Intel Developer Forum, see Jeffrey Burt's eWEEK story, here.

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