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Freescale spins new QorIQ models, first 64-bit PowerPC core

Jun 22, 2010 — by Eric Brown — from the LinuxDevices Archive — 88 views

Freescale announced new P3 and P5 families within its QorIQ system-on-chip platform, as well its first 64-bit Power Architecture core, clockable to 2.5GHz. The single-core QorIQ P5010 and dual-core P5020 processors offer the 64-bit e5500 core, which uses 30 Watts while clocked at 2.2GHz, and the QorIQ P3041 integrates four e500 cores, using 12 Watts at 1.5GHz, says Freescale.

Both the QorIQ P3 and P5 families are designed for network equipment manufacturers seeking to address the challenge of growing Internet traffic, set to quadruple over the next five years, says Freescale Semiconductor.

The QorIQ P5010 and dual-core P5020 system-on-chips (SoCs) primarily target demanding control plane applications within the networking, enterprise storage, security appliance, data center and aerospace/defense markets. The quad-core QorIQ P3041, meanwhile, is aimed at more balanced control- and data-plane applications, with a special focus on LTE wireless basestations, Freescale says.

The new P3 and P5 SoCs use the same 45nm process technology as the earlier QorIQ models, such as the previous high-end model, the eight-core, 1.5GHz P4080. Pin compatibility is promised among the P5, P4, and P3 QorIQ models, says Freescale.

Freescale's first 64-bit e5500 core

Although IBM pushed the PowerPC (Power Architecture) core to 64 bits years ago with processors such as the PowerPC 970, the e5500 is Freescale's first 64-bit PowerPC core. Available only on the two P5 QorIQ processors for now, the e5500 provides twice the performance of Freescale's e500 core, boosting frequencies from up to 1.5GHz to up to 2.5GHz, says Freescale. The e5500 is also said to offer twice the performance per silicon area.

Based on the modified e500 core used in the eight-core QorIQ P4080, the e5500 can run either in 64-bit or 32-bit mode, thereby allowing legacy software support while customers transition to 64-bit processing, says the company.

The e5500 uses the Power Architecture Instruction Set (ISA) v2.06, and offers features that are said to include:

  • seven-stage pipeline with out-of-order execution
  • Increased flat addressable memory space up to 64GB
  • High-performance classic Floating Point Unit (FPU), supporting IEEE 754 floating point operations and double precision floating point
  • Hybrid 32-bit mode to support legacy software and transition to 64-bit architecture
  • L1 cache, backside L2 cache, plus shared L3 cache

The e5500 is debuting on the P5 platform not only due to the growing requirements for performance in control-plane applications, but because "the control plane is outgrowing 32-bit, due to memory addressability issues," said Katie Eckermann, Segment Marketer in Freescale's Networking Products Division.

"As the routing table grows, you need more memory to store it," said Eckermann in an interview with LinuxDevices. In addition, increased memory addressability is important to secondary applications such as the storage and aerospace industries, she added.

Common features among the P3 and P5

The two P5 processors have a different number of cores but share the same interfaces and overall SoC design. The P5 SoCs are in turn almost identical with the P3041 aside from the core technology. Key enhancements to both the P3 and P5 platforms include the addition of dual SATA 2.0 interfaces, RAID support, as well as improvements to Serial RapidIO (SRIO).

Both the P5020 and P5010, as well as the P3041, offer a three-level cache hierarchy. Like the P4080, the P3041 provides only 128KB of backside L2 cache instead of the 512KB supplied by the P5 SoCs, says Freescale.

QorIQ P5020 block diagram

(Click to enlarge)

All three SoCs offer a hardware hypervisor to support multiple simultaneous operating systems, says Freescale. In addition, the SoCs are equipped with a Data Path Acceleration Architecture (DPAA) that includes a security engine and pattern matching engine. A new trustedboot architecture ensures that code is not tampered with or reverse-engineered, says the company.

QorIQ P3041 block diagram

(Click to enlarge)

Unlike with the P4080, the DPAA on the three new SoCs adds a RAID 5/6 engine that accelerates parity calculations for storage applications, says Freescale. This is said to make the processors suitable for enterprise storage area networks (SANs) and enterprise network attached storage (NAS) solutions.

In addition, the DPAA on all three SoCs upgrade the Serial RapidIO (v1.3 + 2.0) capability to support higher bandwidth, while also letting users run Ethernet packages over SRIO, says Freescale. SRIO support has been enhanced with a new message manager that supports Type 9 (data streaming) transactions, while improving Type 11 (messaging), says the company.

All the SoCs offer dual integrated SATA controllers, compared to none on the P4080, and provide four PCI Express (PCIe) Gen 2 controllers instead of three, says Freescale. Other I/O is said to include a 10 gigabit Ethernet interface, five single gigabit Ethernet interfaces, and two USB interfaces with integrated PHYs (see block diagrams above).

Specifications listed for the QorIQ P3041 include:

  • Processor core — 4 x e500mc cores at up to 1.5GHz
  • Cache — 3-level cache hierarchy with 512KB backside L2 per core (128KB on P3041) and 1MB shared L3
  • Memory — Supports DDR3/3L SDRAM up to 1.3GHz
  • Other central features:
    • Hardware hypervisor
    • CoreNet switch fabric
    • Memory controller (dual controllers on P5020)
    • 32/64-bit data bus w/ECC
  • Expansion — Up to 4 x PCIe 2.0 to 5GHz
  • Networking — 5 x gigabit Ethernet; XAUI; support for RGMII, SGMII, and 2.5Gbps SGMII
  • Other I/O:
    • 2 x SRIO (1.3 + 2.0) to 5GHz
    • 2 x SATA 2.0
    • 2 x USB with integrated PHY
    • High-speed Aurora debug port
  • Power — less than 12 W typical (P3014) or 30 Watts (P5020/P5010)

QorIQ P5020 and P5010

The QorIQ P5020 and P5010 SoCs offer Freescale's highest single-threaded performance for embedded control-plane applications, says the company. The dual-core P5020 performs at 13,200 DMIPs in 30 Watts when running at 2.2GHz, says the company.

P5020 routing management card use case example

(Click to enlarge)

Pin-compatible with P4 and P3 platform products, the P5 family provides "roadmap scalability from two 2.2GHz cores up to four and eight 1.5GHz cores," says Freescale. As previously noted, thanks to the e5500 cores, the P5020 increases the flat addressable memory space to 64GB.

The processor also provides an IEEE Standard 754 double-precision floating point unit, providing double the single precision performance and quadruple the double precision floating point performance over the P4080, claims the company.

QorIQ P3041

The QorIQ P3041 expands the reach of Freescale's P4 platform into lower power applications compared to the P4080, says Freescale. It primarily targets mixed control- and data-plane environments such as LTE wireless base-stations, says the company. The SoC is said to support flexible core allocations including groups of cores running SMP; cores running independent or serial applications; cores running in parallel; or cores running end-user applications.

P3041 LTE base-station example

(Click to enlarge)

The P3041 SoC integrates four e500mc Power Architecture cores running at up to 1.5GHz, and can run at less than 12 Watts compared to 30 Watts for the P4080. Performance is claimed at 2.5 DMIPS/MHz. The P3041 is pin-compatible with the QorIQ P4080, P4040, P5020, and P5010 SoCs, and is software compatible with all but those P5 applications that tap the 64-bit capabilities of the e5500.

Software ecosystem

Software solutions for the P3 and P5 SoCs are expected to be initially available for Linux, VxWorks, Integrity, and Enea OSE operating systems, says Freescale. Strategic alliance partners are said to include Enea (OSE), Green Hills (Integrity), and Mentor Graphics (Linux only).

In addition, the platforms will be supported by Wind River (Linux/VxWorks), as well as by development tools from CodeSourcery and RapidIO. Freescale's own VortiQa application software will also support the new QorIQ models, and offf-the-shelf single board computers (SBCs) are planned for the P3 SoCs, says the company.

Freescale: Multicore has its limits

As the QorIQ family increases core frequency, and moves up to 64-bit, it can start to be compared to high-end networking processors based on the 64-bit MIPS core. These include the Cavium Octeon Pro and Octeon II, expected to move to 32 cores next year. Meanwhile the MIPS64-like Tilera Tile family, including the most recently announced Tile-GX, which is expected to scale up to 100 cores early next year.

Freescale expects to release future versions of the P5 with as many as eight cores, said Freescale's Eckermann. However, not all problems can be solved by simply increasing the core count, she added. "The control plane can't be easily broken into parallel code, so multi-core doesn't do that much," said Eckermann.

"When you throw a bunch of cores at a high-end control plane application, you still can't fill up control plane across multiple cores," she continued. "Hopefully, there will be a time when they'll figure it out, but in this generation, the control plane developers are trying to find how to get as much out of a single core as possible. By increasing frequency per core, you can gain more performance without putting such a drag on power efficiency."

When data-plane tasks are a bigger part of the mix, however, as they are with the quad-core P3041, multicore solutions are more effective, said Eckermann. "You can save board space and power by putting the data and control planes on the same core, and the data plane can be split up across many cores," she added.

QorIQ background

Freescale announced the QorIQ line of SoCs in June 2008. The pin- and software-compatible successors to Freescale's PowerQUICC line of network processors range from one to eight PowerPC e500 cores. The eight-core P4080 runs at 1.5GHz on a relatively modest 30 Watts. In December of last year, Freescale added the QorIQ P1012 and dual-core P1021 SoCs to the QorIQ family.

Stated Lisa Su, SVP and GM of Freescale's Networking and Multimedia Group, "Freescale's new e5500 platform opens up a new level of performance for our QorIQ multicore portfolio and enables expansion into additional high-end embedded applications."


Simulated models of the P5020 and P5010 are planned for availability in July 2010, with initial samples planned for the fourth quarter, and qualification expected in the second half of 2011, says Freescale. The P3041 communications processor is also scheduled to begin sampling in the fourth quarter, with qualification planned for 2H 2011, says the company.

More information may be available at Freescale, here.

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