On-chip interconnect specialist Silistix will create a “demonstration chip” to show off its “self-timed interconnect” generation tools. The unnamed chip will run Linux on Tensilica's Diamond Standard 232L core, and will also integrate co-processor cores and IP (intellectual property) blocks from Denali, and Sci-worx. It will use leading-edge 65nm CMOS process technology, Silistix says.

Silistix says its demo chip will integrate much of the functionality of Sci-Worx's “sci-Board-Mobile III” development board. In addition to a Tensilica 232L core, it will integrate Tensilica's 330HiFi 24-bit audio coprocessor, Denali's “Databahn” memory controller core, and Sci-Worx's MuViStar 4000 graphics processor.

The demo chip's interconnect bus will be generated using Silistix's ChainWorks tool suite, said to “take a description of the initiator and target ports of an SoC [system on chip] design, and synthesize a structural netlist for an interconnect system.” The ChainWorks suite comprises:

• ChainLibrary, an “asynchronous interconnect component library”
• ChainDesigner, described as a “design exploration tool that takes a description of the connectivity and ports of a design, and generates the structure of the fabric, along with link widths and fine-grained pipeline stages to balance area, speed, and power tradeoffs”
• ChainCompiler, described as taking “the constrained netlist generated by ChainDesigner, and components from ChainLibrary, to produce the structural netlist suitable for inclusion into the targeted SoC. This netlist is then input into to a conventional logic synthesis tool and mapped to standard cells

Silistix CEO David Fritz stated, “Choosing a complex A/V design that will be implemented in the leading-edge CMOS process will demonstrate the viability and scalability of self-timed interconnect for performance- and power-critical SoC designs.”

Tensilica CEO Chris Rowen stated, “Multimedia is being added to new consumer devices at an incredible rate, and our customers need an easy-to-integrate, silicon-proven audio and video solution. This test chip design will demonstrate to our mutual customers the advantages of using the Silistix interconnect in complex multi-core designs.”

Tensilica announced its Diamond Standard 232L core in March, claiming that the “post-RISC-style” processor to be the lowest-power processor capable of running Linux. It also said the 232L could outperform the ubiquitous ARM926EJ-S core. Tensilica designed the core specifically to run Linux, it said, and the company worked with MontaVista to create a port of Linux Professional Edition for the 232L's “Xtensa” architecture.

 
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