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Linux-ready MIPS64 SoC targets LTE infrastructure

May 2, 2011 — by Eric Brown — from the LinuxDevices Archive — 19 views

NetLogic Microsystems announced a new scaled-down member of its MIPS64-based XLP family, aimed at LTE mobile infrastructure. The XLP316 system-on-chip (SoC) offers four cores clocked to up to 2.0GHz, features a 16-issue, 16-threaded, superscalar processor architecture with out-of-order execution, and supplies 4MB of L3 cache and over 6MB of fully coherent on-chip cache for demanding control-plane processing, says the company.

The XLP316 announcement comes only a week after NetLogic Microsystems announced a fancier member of its Linux-ready XLP family. The XLP864 doubled the number of MIPS64 cores on board to 16, providing 64 independently threaded processes.

The XLP316 is more modestly appointed, offering four cores and 16 threads. This is half the number of cores of NetLogic's flagship, eight-core XLP832. The XLP316 is essentially a quad-core version of the XLP832, aimed at smaller scale communications, networking, storage, and security applications.

Aiming to cache in on LTE market

Although its combined 4MB of L3 cache and over 6MB of fully coherent on-chip cache is less than what is available on the XLP832, the cache is particularly large for a quad-core processor, says NetLogic. This makes it particularly cost-effective for LTE infrastructure, says the company.

The XLP316 meets the growing need for control-plane processing requirements in 3G/4G LTE mobile infrastructure, said to be caused by the increase in frequent, generally short-duration web access from smartphone and tablets, says NetLogic. Control-plane demands are also being stressed by industry migration to IPv6, which generates over 28 orders of magnitude more Internet addresses than IPv4, says the company.

NetLogic has yet to post detailed specs on the XLP316, but aside from differences related to the number of MIPS64 cores, the SoC appears to be almost identical to the XLP832. It offers the same 2.0GHz clock speed, and the same multi-threading, superscalar, out-of-order execution architecture. The latter results in much faster performance than the number of cores alone would suggest, according to NetLogic.

The XLP316 and XLP832 also appear to share the same and Symmetric Multi Processing (SMP) and Asymmetric Multi Processing (AMP) support, low-latency Enhanced Fast Messaging Network, and tri-level cache architecture. Other common features include the integration of a 72-bit DDR3 interconnect — available here in a single channel — yielding over 100Gbps of off-chip memory bandwidth, according to the company. (For more detailed information on these features, see our earlier XLP832 coverage.)

High-speed networking interfaces on the XLP316 are said to include:

  • PCI Express Gen2 4×1 or 1×4
  • 8 x gigabit Ethernet (SGMII) channels
  • 2 x XAUI ports
  • USB 2.0
  • XEN Hypervisor virtualization and I/O virtualization (SR-IOV)

Like other NetLogic multicore processors, the XLP316 offers a software development kit (SDK) that contains reference and production-ready software components, says NetLogic. The Linux SDK appears to be the recently announced Enea Linux PlatformBuilder for NetLogic ("ELPB-NE"), which combines Enea's Eclipse-based IDE with Timesys' LinuxLink build system and related development tools.

Stated Chris O'Reilly, vice president of marketing at NetLogic Microsystems, "Having the industry's only quad-issue, quad-threaded communications processor family with on-chip L3 cache gives us an enormous competitive advantage to address the most demanding control-plane processing requirements."


NetLogic Microsystems is now accepting orders for the XLP316 processors, with standard lead times, says the company. More information may eventually appear on NetLogic's XLP page.

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