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New multi-threading multicore architecture targets Android tablets

Jun 10, 2011 — by Eric Brown — from the LinuxDevices Archive — 2 views

A fabless startup called ICube announced a new multicore processor architecture aimed at Android tablets, claimed to be the first to handle both CPU logic and graphics processing in a “truly integrated” single core. The Harmony Unified Processor Technology architecture offers up to four processing threads per core, and will first appear later this year in a 65nm, dual-core IC1 SoC, says ICube.

The Harmony Unified Processor Technology is designed for mobile computing and communications, with a specific focus on Android-based tablet computers, says Shenzhen, China-based ICube Corp. Harmony features a Multi-Thread Virtual Pipeline (MVP) parallel computing core that integrates CPU and graphics, and offers up to four threads (tasks) per core, says the company. 

The first Harmony system-on-chip (SoC) — the dual-core IC1 — will focus on the Android tablet market. However, the company does not appear to rule out other operating systems. In addition to tablets, embedded controllers, medical equipment, set-top boxes, and home entertainment systems could all make use of Harmony, says ICube.

The IC1 integrates an independent instruction set architecture (ISA) and an optimizing compiler, says ICube. Also available is an Agile Switch dynamic load balancer, says the company.

Logic/GPU integration within each thread?

The validity of ICube's claims that the IC1 is the first processor to handle both CPU logic and graphics processing in a "truly integrated" single core will likely depend on the degree of integration that is demonstrated. Other recent processors, including the post-Pineview Intel Atoms and AMD Fusion processors are also touted for bringing graphics processing on-die.

However, in a story in EETimes, which appears to have first reported on Harmony on June 8, Peter Clarke suggests that the integration goes beyond the current state of the art. In fact, the logic/graphics integration extends to within "each of multiple processing pipelines," writes Clarke.

Later, in a response to a reader's comment at the bottom of the story, Clarke writes, "I just wanted to reiterate that this is not a GPU and CPU in a single core. It is a single ISA that handles both logic processing and graphics rendering." Although we did not see this stated specifically on the iCube site, Clarke says that more information on Harmony will be disclosed in the next issue of EE Times Confidential.

Android reference board and porting tools

An Android-based reference board and "tool sets" will be available to assist application migration to Harmony, says ICube. The process of porting to Harmony's MVP architecture is said to involve re-compiling a C/C++ application using ICube's compilers. Apps written in other languages would need to be rewritten using the MVP assembly language, says the company.

ICube also notes that traditional multicore-ready apps can be ported fairly easily as SMP targets without requiring that they be rewritten to make use of the MVP parallel processing capabilities.

Why mobile devices need parallel processing

Beyond that, the company offers few details, although it has posted a FAQ that offers some more hints. The FAQ argues that using multicore and parallel processing in mobile devices makes more sense than just ramping up clock rates, which results in greater power consumption.

Answering a FAQ question as to whether a single quad-threaded Harmony MVP core running at 600MHz would match the performance of a single-core, single-thread, processor running at 2.4GHz, ICube says it depends on the number of tasks running. Four tasks would perform the same on either processor, but a single task would perform better on the 2.4GHz chip, says ICube.

However, if the single task "has enough coarse-grained parallelism like many applications do," then it could be parallelized to fully utilize MVP's four threads, "in which case the performance for that parallelized task will be the same."

What's more, when simultaneous operation is required, Harmony MVP offers performance advantages in context switching compared to a serial processor, claims ICube. In addition, with MVP, any computational resource that is not being made use of "can be dynamically allocated to another task that can make use of it on a cycle-by-cycle basis," says the ICube FAQ. "This results in much greater utilization, throughput and efficiency."

While the FAQ would appear to suggest a 600MHz clock rate for the initial dual-core IC1, the company does not state this explicitly. No upper limit for the number of cores for future SoC models was listed, either.

ICube says volume shipments should begin by the end of the year, but EETimes says that the company is aiming at a 2012 roll out of samples and volume production.

Do we really need another architecture?

As EETimes' Clarke notes, any attempt to introduce new architecture to compete against ARM, x86, and others, "is likely to be treated with skepticism by many…with objections likely to be on commercial as much as on technical grounds."

According to ICube however, starting fresh with an architecture specifically designed for today's mobile devices will offer significant power-efficiency and cost-efficiency advantages over established architectures. In addition, the open source nature of Android reduces barriers to entry for a new architecture, says the company.

ICube Corp. is now a subsidiary of the recently renamed ICube Technology Holdings Ltd., and the Harmony project is backed by a publicly listed holding company in Hong Kong, says the story.  ICube's staff includes chief technology officer Simon Moy, who has 20 years' experience in semiconductors at Silicon Graphics, IBM, LSI Logic, and Nvidia Corp. At Nvidia, he was said to be a principal engineer working on the hardware design of the vertex shaders and stream processors in GPUs.

Chief scientist Fred Chow, meanwhile, has 30 years experience, with a specialty in compilers. Chow worked as principal engineer at MIPS, and was a chief scientist at Silicon Graphics, as well as director of compiler engineering at PathScale Inc.

Stated Moy, "Developing our own Intellectual Property (IP) from the ground up has been a key differentiation of ICube from other technology companies in China. This provides us with much greater areas for innovation, enables us to leverage the latest semiconductor trends and lowers the cost of our system-on-a-chip (SOC) products relative to other chipmakers."


Finished silicon for the Harmony Unified Processor Technology has been produced and is ready for packaging, with volume shipping expected by the end of this year, says ICube. More information may be found at ICube's website.

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