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Triscend announces ARM SOC with 3,200 field-configurable cells

Sep 18, 2000 — by LinuxDevices Staff — from the LinuxDevices Archive — views

Triscend Corporation (Mountain View, CA), has introduced what it claims is “the industry's first 32-bit Configurable System-on-Chip” (CSoC). The A7 CSoC contains an ARM7TDMI CPU core, memory, a variety of system controllers, plus a large array (up to 40,000) of user-configurable gates. Triscend initially introduced the CSoC concept early last year, but in an 8-bit implementation, the E5 CSoC. The A7 extends the unique CSoC architecture to 32-bits.

The array of user-configurable gates within the A7 CSoC forms up to 3,200 Configurable System Logic (CSL) cells. Those programmable cells allow users of the device to tailor it to a virtually unlimited variety of embedded system requirements, thereby eliminating substantial external logic and reducing system costs and size dramatically. An internal high speed system bus provides fast access between the CPU core and the CSL array, at speeds of up to 264 MBytes/second.

Although Triscend's only announced embedded operating system partnership is currently with Wind River, Embedded Linux is not far behind, according to Triscend marketing manager Ying Dillaha. “We've been flooded with inquiries on Linux support since we announced our ARM CSoC,” said Dillaha. “We most definitely plan to support Linux, as it is becoming an important an addition to the traditional embedded RTOSes.” It is expected that the A7's Embedded Linux implementation will be based on uClinux, which already supports MMU-less processors including the ARM7TDMI.

Here is a summary of the key on-chip functions of Triscend's new A7 CSoC:

  • 32-bit ARM7TDMI processor core
  • 8KB cache RAM
  • Built-in 16KB scratchpad RAM
  • Glueless interface to external ROM/SRAM/Flash/SDRAM
  • 4-channel DMA controller
  • 16-channel interrupt controller
  • 2 16-bit counter/timers
  • 2 UARTs
  • Watchdog timer
  • Advanced debug functions and JTAG interface
  • 512 to 3,200 CSL cells
  • 240 MByte/sec internal system bus
The CSL array is initialized on powerup, based on the contents of external ROM or Flash memory. To assist developers in using the A7, Triscend provides a library of pre-designed macro functions that can be used in programming the A7's CSL array. Available functions include:
  • Display modules: 1/4 VGA LCD controller, 7-segment display driver, …
  • Interface modules: UART, HDLC, SPI, PWM, I2C, SPI, PIO, …
  • Logic modules: arithmetic functions, counter/timers, waveform generators, registers, fifos, …
One common function that can't be implemented within the CSL array is Ethernet. For that reason, Triscend provides an application note that shows precisely how to add an external 10BaseT Ethernet controller, based on a 1-chip MAC/PHY controller, an oscillator, and a few passive components.

Pricing of the A7 CSoC varies according to the number of internal configurable cells, which range from 512 to 3,200. The low end version, with 512 cells, is priced at $13 in quantities of 10,000. The device is sampling now, with full production expected by the end of the this year. An A7 Evaluation Kit, consisting of a small board (5″ x 5″) that implements a full A7-based system including LCD and Ethernet interfaces, will be available in Q4 2000.

 
This article was originally published on LinuxDevices.com and has been donated to the open source community by QuinStreet Inc. Please visit LinuxToday.com for up-to-date news and articles about Linux and open source.



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