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Configurable RISC controller offers Linux-ready MMU

Mar 15, 2010 — by Eric Brown — from the LinuxDevices Archive — 18 views

Tensilica is shipping new Diamond Standard controllers for dataplane applications, including one Linux-optimized model. Based on Tensilica's configurable, 32-bit RISC “Xtensa” architecture, the five upward-compatible processor cores include a Diamond Standard 233L processor with a Linux-optimized MMU, and are claimed to be 15 percent faster and more power efficient than earlier models.

The third-gen Diamond Standard controllers deliver up to 15 percent faster clock speed, up to 20 percent smaller die area, and up to 15 percent less power consumption than the previous generations, claims Tensilica. The controller's well-established "Xtensa" architecture is billed as a fully configurable 32-bit RISC core, supporting 32-, 24-, and 16-bit instructions, with modeless switching. Xtensa also implements short instructions to reduce power consumption and boost code density, similar to ARM's Thumb2. In addition, Xtensa cores further incorporate "register windows" for more efficient procedure switches, says Tensilica.

The Xtensa controllers compete with a wide variety of embedded processors, including ARM9 chips, programmable digital signal processors (DSPs), and field programmable gate arrays (FPGAs). A number of Xtensa-based chips have supported Linux, including a mobile-oriented Diamond Standard 232L. (See farther below for more background on Tensilica and Xtensa.)

The new Diamond Standard 233L is based closely on the Diamond Standard 212GP, adding an MMU and other features to support Linux, says Tensilica. The Diamond Standard 233L incorporates a fully synthesizable 32-bit RISC core that offers performance rated at 1.38 DMIPS/MHz, claims the company. The controller is said to be equipped with 16KB instruction and data, a 4-way set associative, and a "full-featured" Memory Management Unit (MMU) for application processing.

Diamond Standard 233L block diagram
(Click to enlarge)

The MMU is said to be optimized for Linux, but appears to be configurable to other operating systems as well. Equipped with instruction and data Translation Lookaside Buffers (TLBs), which manage virtual-to-physical address mapping, the MMU is said to provide four different privilege levels for memory protection. Other touted MMU features include variable page sizes and multiple access modes.

The Diamond 233L includes a non-maskable interrupt for critical system events, as well as six levels of interrupts to help ease the development of software interrupt handlers and external interrupt priority hardware design, says Tensilica. In addition, the controller is said to support arithmetic and DSP operations, thereby reducing the need to include a separate DSP.

According to Tensilica, a single-cycle 16×16 MAC unit adds four dedicated 32-bit registers and a 40-bit accumulator to provide DSP operations. In addition, the controller offers support for zero overhead looping, clamps (saturating arithmetic), max/min value, normalize, and sign extend, says the company. Arithmetic support, meanwhile, is supplied by a built-in 32×32 multiplier and 32-bit integer divide.

Features and specifications listed for the Diamond Standard 233L controller, include:

  • Linux-compatible Memory Management Unit
  • 5-stage pipeline
  • Dhrystone 2.1: 1.38 DMIPS/MHz
  • 24/16-bit ISA with modeless switching
  • Iterative 32×32 multiplier and 32-bit integer divider
  • Single cycle 16×16-bit MAC
  • 16-bit DSP instructions
  • 16Kbyte, 4-way set associative instruction and data caches
  • Integrated interrupt controller with 22 interrupts at 6 priority levels
  • Three integrated timers
  • On-chip debugging hardware
  • Embedded trace support

Other newly announced Diamond Standard family of cores include:

  • Diamond 106Micro — This small footprint, ultra-low-power, cache-less controller offers memory protection, an iterative 32×32 multiplier, 15 interrupts, an integrated timer, and on-chip debug hardware, says Tensilica. The controller is said to have been tested with Dhrystone 2.1 benchmark results of 1.22 DMIPS/MHz.
  • Diamond 108mini — The tiny 108mini adds a 32-bit integer divider, dual local data RAMs, 22 interrupts, three integrated timers, and dual 32-bit GPIO ports. Claimed benchmark results are 1.34 DMIPS/MHz.
  • Diamond 212GP — The "powerful" 212GP adds data and instruction caches, as well as 16-bit DSP instructions, and offers touted performance of 1.38 DMIPS/MHz.
  • Diamond 570T — This "ultra-high-performance" controller is equipped with a three-issue VLIW (very long instruction word) core with dual 32×32 MULs and 16 Kbyte, 2-way set associative instruction and data caches, achieving claimed performance of 1.59 DMIPS/MHz.

All of the Diamond controllers are available with support for AMBA AHB-Lite, as well as AXI bridges with asynchronous or synchronous clocks, says Tensilica. The Diamond 233L is said to be available with a "c omprehensive software design environment" supporting Linux.

An Xtensa background check

Tensilica and MontaVista Software announced plans to port MontaVista's embedded Linux distribution (then called Hard Hat Linux) to the Xtensa platform back in 2001. The Xtensa cores were first made available with Linux support in 2003, and provided with a Linux-ready Eclipse IDE (integrated development environment) later that year.

Linux-ready Xtensa processors have included a Diamond Standard 232L, released in 2006, which was aimed at mobile devices. Later that year, the company released the MontaVista Linux-ready LX2 and Xtensa 7 cores, which targeted embedded control and digital signal processing applicaitions. Both cores were also made available with tools intended to help designers configure interfaces, memory subsystems, and other components, as well as to extend the architecture with C/C++ application-specific instructions.

Stated Steve Roddy, Tensilica's VP of marketing and business development. "These deeply embedded control cores can also serve as a starting point for customization of a tailored Xtensa dataplane processor (DPU) for designers looking to incorporate additional control or signal processing capability."


The Diamond Standard 233L and four other new Diamond Standard processors are available now, says Tensilica, which did not release pricing. More information, including frequency, area, and power specs may be found here. Tensilica's Linux development portal site may be found here.

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