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Eight-core DSP claimed to be fastest ever

Nov 9, 2010 — by Eric Brown — from the LinuxDevices Archive — 14 views

Texas Instruments (TI) announced a “TMS320C66x” family of digital signal processors (DSPs), including the TMS320C6678, which, with eight 1.25GHz cores, is claimed to be the industry's fastest. The Linux-ready C66x DSPs also include a dual-core C6672, a quad-core C6674, and a quad-core C6670 communications SoC version with extra networking coprocessors.

The C66x multicore DSPs target mission critical applications, including public safety and defense, medical and high-end imaging, test and automation, high-performance computing, and core networking, says TI.

The C66x DSPs include three pin-compatible multicore DSPs in two-, four-, and eight-core versions: the TMS320C6672, TMS320C6674, and TMS320C6678, respectively. There is also a four-core communications SoC, the TMS320C6670.

All but the C6670 are pin-compatible with each other, and all the devices are software-compatible with earlier TMS320C6000 DSPs, says the chipmaker. (These include the TMS320C64x+ SoCs, previously the highest performing multi-core DSP processors in the TMS320C6000 family.)

Each C66x processor is built with multiple 1.0GHz or 1.25GHz DSP cores. By comparison, the C64x DSPs range from three or six cores, and whereas the tri-core devices range up to 1.2GHz, the six-core models top out at 700MHz each.

Eight-core C6678 block diagram
(Click to enlarge)

TI adds up the 1.25GHz cores in the eight-core C6678 and calls it the industry's first 10GHz DSP. Using similar over-simplistic math, it appears, the company claims 320 GMACs (giga multiply-accumulate operations) and 160 GFLOPs (gigaflops) of combined fixed- and floating-point performance.

It remains to be seen how truly scalable the C66x line will be, but TI says BDTI benchmarks back up its claim that the C66x DSP cores surpass the performance of any other DSP in the industry by a factor of five.

Whereas the C64x processor cores are built on a third-generation VelociTI very-long-instruction-word (VLIW) architecture, the new C66x DSPs use TI's new KeyStone multicore architecture. The KeyStone architecture maximizes the throughput of on-chip data flows, eliminating the possibility of bottlenecks, claims TI.

The KeyStone architecture is further touted for its relative ease of use. The architecture supports accompanying features such as a "Multicore Navigator" claimed to enable direct communication between cores and memory access. It also provides an enhanced memory architecture and a Hyperlink interface, while supporting PCI Express (PCIe) Gen 2, Serial RapidIO, and additional peripherals, says the company.

C66x models compared
(Click to enlarge)

The processors offer packet and security network accelerators, as well as amounts of L1 and L2 SRAM that vary as indicated in the table above. All four devices support 64-bit DDR3 memory and 64-channel EDMA, TI adds.

As noted, the devices support PCIe and Serial RapidIO lanes, as well as gigabit Ethernet, telecom serial, UART, i2C, SPI, and GPIO interfaces. Timers are also said to be available.

C6670 block diagram, showing coprocessors on right
(Click to enlarge)

The quad-core C6670 SoC stands out from it siblings with the addition of coprocessors used for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. These include three for turbo encoding, four for Viterbi Decoding, and two Fast Fourier Transform coprocessors, says TI. In addition the C6670 is said to provide four Rake Search accelerators for chip rate processing and Reed-Muller decoding.

The C66x line of DSPs is claimed to draw 0.9 V to 1.1 V, with power-saving features supplied by TI's SmartReflex technology. The processors can also dynamically adjust supply voltages in response to environmental conditions, says the company.

Development kits and third party partners

TI supplies a free multicore software developer's kit (MC-SDK) based on Linux, as well as a suite of multicore tools. In addition, low-cost evaluation modules (EVMs) are available from TI for the TMS320C6670 or the TMS320C6678 processor, known as the TMDXEVM6670L or TMDXEVM6678L EVMs, respectively. Both include a free MC-SDK, Code Composer Studio software, and a suite of application/demo codes, says TI.

Third parties software partners supporting the C66x devices include 3L, Azcom Technologies, Critical Blue, Enea, MimoOn, Nash Technologies, Polycore Software, and Tata Elxsi, says TI. Hardware partners are said to include Advantech, Blackhawk, and CommAgility.

With TI's recent Linux port to the C64x DSPs, system designers developing signal-intensive equipment can take full advantage of the DSP cores directly with Linux, without requiring a SoC that also includes an ARM core. These would include the recently announced TMS320DM8168 as well as many other TI OMAP, Sitara, and DaVinci SoCs such as the DaVinci DM3730.

Presumably, similar streamlined access to Linux developers is being provided for the C66x family as well. TI has recently been making a major push to open up its DSP architectures to ARM Linux developers. These efforts include the release of two free Linux development tools to ease programming of the TMS320C6000 DSP. The C6EZRun tool partitions code between the DSP and ARM cores, while C6EZAccel offers an ARM-side API library of over 130 optimized DSP kernels.

Stated Brian Glinsman, general manager of TI's communications infrastructure business, "Our new power-efficient C66x multicore devices are an aggressive game changer, providing developers with a cost effective solution and unprecedented levels of performance to match the needs of the industry and our customers."


Order entry is open today for the TMDXEVM6670L or TMDXEVM6678L EVMs, for $399 each, with shipment expected to begin in 1Q 2011, says TI. Pricing for the C66x DSPs starts at $99 for 1Ku and are also available for order today, with shipment expected in 1Q 2011.

More information on the C66x DSPs may be found here.

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