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MIPS32 core optimized for Linux, Android

Nov 2, 2009 — by Eric Brown — from the LinuxDevices Archive — 8 views

MIPS Technologies announced two new MIPS32 cores, including one that's optimized for Linux. Both the M14K core and the M14Kc — a superset that incorporates Android-ready, Linux/Java microcode — support MIPS' microMIPS instruction set architecture, enabling 1.5 DMIPS/MHz performance and advanced code compression that can reduce code size by 35 percent, says the company.

Both the M14K and M14Kc cores are aimed at "extremely cost-sensitive embedded applications," says MIPS Technologies. The products are said to be the first MIPS32-compatible cores to offer the new microMIPS instruction set architecture, which is said to maintain 98 percent of MIPS32 performance while reducing code size by 35 percent. As a result of this compression, the cores enable "significant silicon cost savings," while offering reduced memory access and more efficient use of the instruction cache, thereby helping to reduce system power consumption, claims the company.

Previous MIPS32 cores have included the 24K core and the multi-thread capable 34K core. MIPS also offers a line of MIPS64 cores used in high-end networking processors from Cavium among others.

The new cores' microMIPS architecture offers 32-bit performance with 16-bit code size for most instructions, says MIPS. "Backward compatible," microMIPS  is said to combine recoded and new 16- and 32-bit instructions, incorporating all MIPS32 instructions and Application Specific Extensions (ASEs) including MIPS-3D ASE, MIPS DSP ASE, MIPS MT ASE, and SmartMIPS ASE. In addition, microMIPS is said to supply new instructions for advanced code-size reduction. The 1.5 DMIPS/MHz performance figure cited for microMIPS is said to be based on a 180MHz clock rate using 130nm fabrication.

MIPS base-level M14K core block diagram
(Click to enlarge)

The base-level M14K core uses the MIPS32 4K micro-architecture, and is optimized for MCU and real-time embedded applications (see block diagram above). It offers reduced interrupt latency and flash acceleration, as well as debug features including iFlowTrace, says MIPS. The core also supports interconnect interfaces that use AHB Lite, a subset of AHB used in designs that are limited to a single bus master, the company adds.

MIPS M14Kc core block diagram

(Click to enlarge)

Linux developers will likely focus on the M14Kc core, which builds on the M14K platform with additional features that are said to target embedded applications such as home entertainment, home networking, and personal mobile entertainment devices. The core is said to offer a full cache controller and translation look-aside buffer memory management unit (see block diagram above).

The M14Kc targets applications that "require a compact footprint but also the ability to execute increasingly complex software algorithms on an RTOS or Linux," says the company. The M14Kc core is based on the MIPS32 4KEc micro-architecture, which provides a Linux and Java engine that is said to be suitable for Android-driven devices.

Prior to being acquired by Mentor Graphics this summer, Linux development firm Embedded Alley worked with MIPS and RMI to complete a port of Android to MIPS, with the first implementation targeting RMI's MIPS32-based Au1250 processor. Mentor Graphics has since committed to supporting Android on MIPS, while also pushing an Android port to PowerPC in collaboration with Freescale.

Linux and tools support

Both new cores are supported with software development tools, including the Eclipse-based MIPS Navigator Integrated Component Suite (ICS) and System Navigator probes for debugging. In addition, third party vendors have announced support for the cores.

Support testimonials were offered from CodeSourcery (Sourcery G++), Express Logic (ThreadX), and Micrium (uC/OS-II). Specific support for the M14Kc core was announced by Mentor Graphics for its Linux, Android, and Nucleus distributions, as well as by MontaVista Software for MontaVista Linux 6, and Timesys for its LinuxLink development framework.

MIPS will also provide simulation models for the M14K and M14Kc cores, based on Carbon Design Systems technology, for verification in SystemC and co-simulation environments. Software developers, meanwhile, will be able to call upon "fast instruction set" simulators, developed in conjunction with Imperas, for use in software development and virtual platforms, says MIPS.

Stated Art Swift, VP of marketing at MIPS Technologies, "Growing amounts of signal processing and higher speed connectivity are driving up the performance requirements in MCUs and many cost-sensitive embedded applications, while still requiring a very small silicon footprint. We're enabling our customers to develop high-performance devices in smaller form factors to significantly decrease development costs."

Stated Scott Mullarkey, VP, worldwide business development, MontaVista Software, "We recently announced support for MIPS32 cores in our new MontaVista Linux 6 Market Specific Distributions (MSDs). MontaVista Linux 6 will also provide support for the M14Kc core to enable MIPS developers to quickly create differentiated products by building on an optimized, commercial-quality embedded Linux."


The M14K and M14Kc cores will be available in the first quarter of 2010, says MIPS. More information may be found here.

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