NetSilicon announces enhanced system-on-chip
Apr 3, 2001 — by LinuxDevices Staff — from the LinuxDevices Archive — viewsWaltham, MA — (press release excerpt) — NetSilicon, Inc. today launched its highest performance system-on-chip (SOC) processor, the NET+50. The NET+50 is a completely integrated hardware and software solution designed for OEMs of network-connected electronic devices.
The NET+50 is part of the NetSilicon family of NET+ARM 32-bit ARM-based SOCs which make up the hardware portion of NetSilicon's integrated device networking platform. NET+50 features include . . .
- 8KB on-chip cache
- up to 44Mhz clock speed
- external DMA bus master
- shared memory interface
- 10 Base T, 100 Base T Ethernet support
- 10 Channel DMA Controller
- dual serial ports, asynchronous and synchronous HDLC
- memory support, including SDRAM, Flash, EDO RAM and RAM
- watchdog and dual programmable timers
- increased General Purpose I/O of up to 40 programmable I/O pins, up to 32 general purpose input pins, and 20 pins with programmable interrupt
- RTOS support for NetSilicon upgrades of the NET+OS and NET+Lx (uClinux-based) value-added, integrated platforms.
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