ARM has launched a processor it says will bring desktop-level computing performance to low-cost, high-volume computing devices. The Cortex-A8 — described as ARM's highest-performance, lowest-power design yet — targets cell phones, media players, and other mobile devices, but could also bring ARM into new device categories, including media encoders, the company says.

ARM debuted the A8 at its week-long Developer's Conference in Santa Clara this morning.

According to ARM, the A8 will clock between 600MHz and 1GHz, on both 65nm and 90nm process technology. The processor's dual-issue design enables it to deliver 2,000 DMIPS (Dhrystone MIPS) at 1GHz. Power draw is claimed to be less than 300mW when implemented using 65nm technology.

In other words, the A8 “burns as much power as an ARM11, but delivers two to three times the performance,” according to ARM's product manager, Travis Lanier.

Kerry McGuire, product manager of the A8, says the key enabler to the processor's low power requirement is a new “Artisan” design flow library that combats power leakage problems typical at process technologies smaller than 90nm. The Artisan library will not ship until early next year, however.

The A8 also shaves power by supporting traditional static and dynamic management techniques, such as frequency and voltage scaling. Another claimed power — and code density — advantage is support for ARM's “Thumb-2” 16-/32-bit instruction set for microcontrollers — one of the core components of the new ARMv7 instruction set the A8 is based on.

ARMv7 and the Cortex line

ARMv7 is ARM's next-generation ISA (instruction set architecture). It succeeds the ARMv5 ISA used in the ARM's ARM7, ARM9, and ARM11 processors, as well as in XScale processors from ARM ISA licensee Intel.

ARM's first processor family based on ARMv7 is called “Cortex.” The line stretches across a surprisingly broad range of performance ratings — not unlike Linux itself — from the simple microcontroller-replacement M3, which supports only Thumb-2 instructions, to high-end application processors such as the A8, which in addition to Thumb-2, supports 32-bit ARM instructions and a bevy of application-specific instruction sets.

The Cortex line will also include midrange R-series processors, the first of which is expected to debut later this year, Lanier said.

The A8

According to ARM, the A8 features an advanced superscalar pipeline that can execute multiple instructions simultaneously, to deliver “more than 2.0 DMIPS per MHz.” The processor integrates a size-configurable, power-optimized L2 cache, which works in conjunction with fast 16KB or 32KB L1 caches to minimize access time and maximize throughput, the company claims. When built on 65nm processes, a barebones A8 core without L2 cache can fit in as little as four square millimeters of silicon, ARM says.

The A8 sports media, security, and Java engines
(Click to enlarge)

The A8 is the first of ARM's own processor designs to integrate its Neon integer and floating-point pipelines for media and signal processing. When ARM announced Neon in October of 2004, it said chips supporting Neon instructions could decode an MP3 stream in 8-10MHz. McGuire says Neon helps the A8 deliver a four-fold improvement per clock cycle over media processing capabilities in ARM9-class processors — a capability likely to result in larger, higher resolution VGA and WVGA screens on ARM-based video playback devices. Additionally, the A8's low-power media processing capabilities could help push the processor into media encoders and other new application areas, she said.

Another new feature in the A8 is a “Jazelle-RCT” instruction set for Java. McGuire explains, “ARM11 and ARM9 supported Jazelle-DBX, or 'direct bytecode execution.' The A8 supports Jazelle-RCT, which is tailored to work with ahead-of-time compilation of technologies like Java. It could also support .NET, or perl, in conjunction with JIT (just-in-time) or DAC (dynamic adaptive compilation) compilers supplied by Sun, Applix, Esmertec or others. Jazelle-RCT provides very efficient processing in a very small footprint — in a footprint as close to bytecode as possible.”

The A8 also includes ARM's TrustZone extension, which McGuire called “the foundation” of Cortex products. TrustZone technology is aimed at DRM (digital rights management) and other high-security devices.

Early customers

ARM says it has signed up five early semiconductor licensees for the A8, including four willing to go public: Freescale, Matsushita (Panasonic), Samsung, and Texas Instruments. All four publicly announced A8 licensees are using the processor in chips targeting mobile phones, Lanier confirmed.

ARM additionally expects a number of EDA (electronic design automation) tools and OS vendors — including the usual embedded Linux OS vendors — to support the new processor.

Additionally, ARM will offer a variety of development and debug tools, modeling technologies, and physical cell libraries to support semiconductor engineers designing silicon around the A8 processor. These include:

• RealView Architect series of ESL (electronic system level) tools for rapid prototyping and architectural exploration, and for simulating a target before hardware is available
• AMBA Designer design automation tool, based around MaxSim technology, provides design flow automation for advanced AMBA interconnect sub-systems
• RealView Developer series, including the RealView Development Suite, which includes code generation tools with Cortex-A8 processor-specific enhancements. The tools support all A8 processor features, including the Neon media and signal processing extensions (Neon complies with the Khronos Group's OpenMAX standard, and thus should support tools compliant with that standard as well)
• CoreSight debug technology — the A8 includes Embedded Trace Macrocell technology and implements the ARMv7 architecture-compliant debug interface. An available CoreSight DK-A8 design kit extends the debug and trace capability to cover the entire system-on-chip including multiple ARM processors, DSPs, and intelligent peripherals, ARM claims.
• Artisan Advantage-CE library enables high-speed operation and low static and dynamic power consumption. Includes more than one thousand cells, many specifically designed for the A8, ARM says. Leakage power reduction is achieved through power gating MT-CMOS cells and retention flip-flops to support sleep and standby modes.

Will Straus, president of analyst firm Forward Concepts, said, “With the Cortex-A8 processor, ARM has demonstrated its commitment to enabling the next generation of advanced cell phones, media players and new portable devices requiring robust digital signal processing and control capabilities. I expect that the Cortex-A8 processor will ensure ARM's continued leadership in the portable electronics market.”

Availability

The ARM Cortex-A8 processor is available for licensing now, along with the majority of the supporting technology. The Advantage-CE library in “leading 65nm technologies” is expected to ship in 1Q06.

 
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