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Dual ARM core design claimed twice as fast as Atom

Sep 16, 2009 — by LinuxDevices Staff — from the LinuxDevices Archive — 4 views

ARM Holdings has announced two dual-core implementations of its Cortex-A9 processor, newly capable of achieving clock speeds above 2GHz. Code-named “Osprey,” the designs have the potential to offer more than double the performance of Intel's 1.6GHz Atom N270, says the UK-based firm, which joined the Linux Foundation this week.

The new Cortex-A9 implementations come in the form of "hard macros" and IP (intellectual property), set to be delivered to licensees during the fourth quarter, says ARM. Both Osprey versions are said to be designed for TSMC's 40nm-G process, "enabling silicon manufacturers to have a rapid and low-risk route to silicon for high-performance, low-power Cortex-A9 processor-based devices."

A "power-optimized" Osprey implementation is designed to run at 800MHz, consuming just 0.25 Watts per core, or 0.5 Watts overall, and will deliver 4000 Dhrystone MIPS, says ARM. Meanwhile, a "speed-optimized" implementation will consume just 1.9 Watts, delivering 10,000 Dhrystone MIPS.

According to Eric Schorn, an ARM VP of marketing quoted by EETimes Europe, the 800MHz Osprey will outperform the 1.6GHz Intel Atom N270. Meanwhile, the 2.0GHz Osprey will outperform the N270 by 250 percent, Schorn is said to have added.

"The goal is performance, performance, performance," Schorn is quoted as saying. "We are into unlocking some new markets; netbooks, smartbooks, MIDs, consumer electronics in TV and entertainment devices, and enterprise networking, such as things like printers."

Both Ospreys will also be significantly smaller than Atom processors, ARM is said to have claimed. The power-optimized version, for example, will occupy 4.9 square millimeters of die, while the performance-optimized version will occupy 6.7 square millimeters, according to EETimes Europe.

The Osprey design includes a fixed L1 cache of 32KB for instructions and 32KB for data, plus an L2 cache controller that supports between 128KB and 8MB, says ARM. The hard macros also include a Neon media processing engine, AMBA (advanced microprocessor bus architecture) interconnect compatibility, and the CoreSight PTM (program trace macrocell), the company adds.

As noted by Peter Clarke's EETimes Europe article, the hard macros for Osprey do not include graphics, though test chips being taped out by ARM do. "There is s a Mali-400 multimedia processor and a Mali-VE video engine on the dual-Osprey test chip," Schorn is quoted as saying.

According to ARM, both new Cortex-A9 hard macros support SMP (symmetrical multiprocessing) operating systems, and will be adaptable to quad-core and eight-core designs in the future. Like other ARM CPUs, Osprey based products will not run x86-only operating systems, such as what Schorn refers to as "big Windows." As usual, however, they'll be compatible with Linux, Windows CE, and Windows Mobile.

Yesterday, ARM Holdings announced it had joined the non-profit Linux Foundation (LF) organization. The long-time contributor to the Linux kernel will work with its mobile and desktop workgroups, says the LF.

Cortex-A9 background

Announced in Oct. 2007, ARM's Cortex-A9 core was promoted from the outset as supporting clock speeds over 1GHz and performance of around 2,000 Dhrystone MIPS. The A9 also arrived with support for ARM's MPCore interconnect technology, pictured below in a quad-core implementation.

ARM's MPCore linking four Cortex-A9 cores
(Click to enlarge)

Osprey-based processors won't be the first speedy, 45nm ARM CPUs to hit the market. Last February, ARM licensee Texas Instruments (TI) announced its own dual-core Cortex-A9 implementation, the OMAP4430 and OMAP4440, which it said would be sampling during the second half of 2009. Scheduled for volume production during the second half of 2010, the 45nm OMAP4 chips will include Powervr SGX540 graphics and be capable of 1080p video playback, says TI. NXP also appears to be working on a Cortex-A9-based design.

Meanwhile, Samsung and Intrinsity recently announced what they're touting as the "the industry's fastest mobile processor core implementation" of the earlier ARM Cortex-A8 architecture. SoCs based on the implementation — code-named Hummingbird — will run at 1GHz, use a 45nm production process, and feature extremely low power leakage in sleep mode, the companies say.

The Cortex-A8, meanwhile, has become a star player in the embedded world over the last few years, by way of the the Texas Instruments (TI) OMAP35xx and cellphone-oriented OMAP34xx system-on-chips (SoCs), as well as the newer Freescale i.MX51x family. The Cortex-A8 uses a 65nm production process and is clocked at 600MHz.


According to ARM, its new Cortex-A9 hard macros can be licensed now, and will be delivered during the fourth quarter. Osprey evaluation chips will reportedly be available to partners and software designers in the first quarter of 2010.

More information on the Cortex-A9 hard macros can be found on the ARM website, here.

The EETimes Europe story alluded to above may be found here.

The Linux Foundation blog about ARM joining the organization may be found here.

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